Influence of anti-resonance peak in power supply network on power and signal integrity

Toma Yamaguchi, Yusuke Hatogai, Toshio Sudo

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Reduction of PDN impedance is necessary to prevent false logic operation of the CMOS LSIs. Constant target impedance with frequency is used as a simple method to define PDN impedance of the system. However, this conventional target impedance did not change with frequency, and was not applied to the high frequency range where PDN impedance exceeds the constant value of target impedance. Therefore, newly frequency dependent target impedance has been derived and applied to the DDR3 memory system. Co-simulation model has been established to estimate power Integrity (PI) and signal Integrity (SI) at the same time. The switching current flowing from the chip was connected to the whole PDN model, and power supply noise and eyes diagram were simulated. The new target impedance has been proved to be reasonable for maintaining the power supply noise and the eye diagrams.

Original languageEnglish
Title of host publicationIEEE International Symposium on Electromagnetic Compatibility
Pages224-228
Number of pages5
Publication statusPublished - 2013
Event2013 International Symposium on Electromagnetic Compatibility, EMC Europe 2013 - Brugge
Duration: 2013 Sep 22013 Sep 6

Other

Other2013 International Symposium on Electromagnetic Compatibility, EMC Europe 2013
CityBrugge
Period13/9/213/9/6

Fingerprint

power supplies
integrity
impedance
Data storage equipment
diagrams
large scale integration
logic
CMOS
frequency ranges
chips
estimates
simulation

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Condensed Matter Physics

Cite this

Yamaguchi, T., Hatogai, Y., & Sudo, T. (2013). Influence of anti-resonance peak in power supply network on power and signal integrity. In IEEE International Symposium on Electromagnetic Compatibility (pp. 224-228). [6653232]

Influence of anti-resonance peak in power supply network on power and signal integrity. / Yamaguchi, Toma; Hatogai, Yusuke; Sudo, Toshio.

IEEE International Symposium on Electromagnetic Compatibility. 2013. p. 224-228 6653232.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Yamaguchi, T, Hatogai, Y & Sudo, T 2013, Influence of anti-resonance peak in power supply network on power and signal integrity. in IEEE International Symposium on Electromagnetic Compatibility., 6653232, pp. 224-228, 2013 International Symposium on Electromagnetic Compatibility, EMC Europe 2013, Brugge, 13/9/2.
Yamaguchi T, Hatogai Y, Sudo T. Influence of anti-resonance peak in power supply network on power and signal integrity. In IEEE International Symposium on Electromagnetic Compatibility. 2013. p. 224-228. 6653232
Yamaguchi, Toma ; Hatogai, Yusuke ; Sudo, Toshio. / Influence of anti-resonance peak in power supply network on power and signal integrity. IEEE International Symposium on Electromagnetic Compatibility. 2013. pp. 224-228
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