Linear voltage-to-current converters with current reuse technique

Nicodimus Retdian; Daisuke Horii; Shigetaka Takagi

doi:10.1007/s10470-011-9665-y

Linear voltage-to-current converters with current reuse technique

Nicodimus Retdian, Daisuke Horii, Shigetaka Takagi

Research output: Contribution to journal › Article › peer-review

2 Citations (Scopus)

Abstract

This paper proposes a linear voltage-to-cur-rent converter with current reuse technique to reduce circuit power consumption without deteriorating its linearity and bandwidth. The proposed circuit is designed using 0.18 μm CMOS process parameters from TSMC. Simulation results show that the total harmonic distortion (THD) of the proposed circuit with a 2.5-V input amplitude is less than 1% for input frequency up to 200 MHz under a 1.8-V supply voltage. The total current consumption is 10.8 mA.

Original language	English
Pages (from-to)	549-556
Number of pages	8
Journal	Analog Integrated Circuits and Signal Processing
Volume	72
Issue number	3
DOIs	https://doi.org/10.1007/s10470-011-9665-y
Publication status	Published - 2012 Sep
Externally published	Yes

Keywords

Current reuse
Flipped voltage follower
Voltage attenuator
Voltage-to-current converters

ASJC Scopus subject areas

Signal Processing
Hardware and Architecture
Surfaces, Coatings and Films

Access to Document

10.1007/s10470-011-9665-y

Cite this

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title = "Linear voltage-to-current converters with current reuse technique",

abstract = "This paper proposes a linear voltage-to-cur-rent converter with current reuse technique to reduce circuit power consumption without deteriorating its linearity and bandwidth. The proposed circuit is designed using 0.18 μm CMOS process parameters from TSMC. Simulation results show that the total harmonic distortion (THD) of the proposed circuit with a 2.5-V input amplitude is less than 1% for input frequency up to 200 MHz under a 1.8-V supply voltage. The total current consumption is 10.8 mA.",

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AU - Retdian, Nicodimus

AU - Horii, Daisuke

AU - Takagi, Shigetaka

N1 - Funding Information: Acknowledgements This work is supported by MEXT’s program ‘‘Promotion of Environmental Improvement for Independence of Young Researchers’’ under the Special Coordination Funds for Promoting Science and Technology and by VLSI Design and Education Center (VDEC), the University of Tokyo in collaboration with Cadence Design Systems, Inc.

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N2 - This paper proposes a linear voltage-to-cur-rent converter with current reuse technique to reduce circuit power consumption without deteriorating its linearity and bandwidth. The proposed circuit is designed using 0.18 μm CMOS process parameters from TSMC. Simulation results show that the total harmonic distortion (THD) of the proposed circuit with a 2.5-V input amplitude is less than 1% for input frequency up to 200 MHz under a 1.8-V supply voltage. The total current consumption is 10.8 mA.

AB - This paper proposes a linear voltage-to-cur-rent converter with current reuse technique to reduce circuit power consumption without deteriorating its linearity and bandwidth. The proposed circuit is designed using 0.18 μm CMOS process parameters from TSMC. Simulation results show that the total harmonic distortion (THD) of the proposed circuit with a 2.5-V input amplitude is less than 1% for input frequency up to 200 MHz under a 1.8-V supply voltage. The total current consumption is 10.8 mA.

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KW - Voltage attenuator

KW - Voltage-to-current converters

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Linear voltage-to-current converters with current reuse technique

Abstract

Keywords

ASJC Scopus subject areas

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