Abstract
This paper proposes a linear voltage-to-cur-rent converter with current reuse technique to reduce circuit power consumption without deteriorating its linearity and bandwidth. The proposed circuit is designed using 0.18 μm CMOS process parameters from TSMC. Simulation results show that the total harmonic distortion (THD) of the proposed circuit with a 2.5-V input amplitude is less than 1% for input frequency up to 200 MHz under a 1.8-V supply voltage. The total current consumption is 10.8 mA.
| Original language | English |
|---|---|
| Pages (from-to) | 549-556 |
| Number of pages | 8 |
| Journal | Analog Integrated Circuits and Signal Processing |
| Volume | 72 |
| Issue number | 3 |
| DOIs | |
| Publication status | Published - 2012 Sep |
| Externally published | Yes |
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Keywords
- Current reuse
- Flipped voltage follower
- Voltage attenuator
- Voltage-to-current converters
ASJC Scopus subject areas
- Surfaces, Coatings and Films
- Hardware and Architecture
- Signal Processing
Cite this
Linear voltage-to-current converters with current reuse technique. / Nicodimus, Retdian; Horii, Daisuke; Takagi, Shigetaka.
In: Analog Integrated Circuits and Signal Processing, Vol. 72, No. 3, 09.2012, p. 549-556.Research output: Contribution to journal › Article
}
TY - JOUR
T1 - Linear voltage-to-current converters with current reuse technique
AU - Nicodimus, Retdian
AU - Horii, Daisuke
AU - Takagi, Shigetaka
PY - 2012/9
Y1 - 2012/9
N2 - This paper proposes a linear voltage-to-cur-rent converter with current reuse technique to reduce circuit power consumption without deteriorating its linearity and bandwidth. The proposed circuit is designed using 0.18 μm CMOS process parameters from TSMC. Simulation results show that the total harmonic distortion (THD) of the proposed circuit with a 2.5-V input amplitude is less than 1% for input frequency up to 200 MHz under a 1.8-V supply voltage. The total current consumption is 10.8 mA.
AB - This paper proposes a linear voltage-to-cur-rent converter with current reuse technique to reduce circuit power consumption without deteriorating its linearity and bandwidth. The proposed circuit is designed using 0.18 μm CMOS process parameters from TSMC. Simulation results show that the total harmonic distortion (THD) of the proposed circuit with a 2.5-V input amplitude is less than 1% for input frequency up to 200 MHz under a 1.8-V supply voltage. The total current consumption is 10.8 mA.
KW - Current reuse
KW - Flipped voltage follower
KW - Voltage attenuator
KW - Voltage-to-current converters
UR - http://www.scopus.com/inward/record.url?scp=84865131460&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84865131460&partnerID=8YFLogxK
U2 - 10.1007/s10470-011-9665-y
DO - 10.1007/s10470-011-9665-y
M3 - Article
AN - SCOPUS:84865131460
VL - 72
SP - 549
EP - 556
JO - Analog Integrated Circuits and Signal Processing
JF - Analog Integrated Circuits and Signal Processing
SN - 0925-1030
IS - 3
ER -