Low-power-consumption 10-Gbps GaAs 8: 1 multiplexer/1:8 demultiplexer

Nobuhide Yoshida, Masahiro Fujii, Takao Atsumo, Keiichi Numata, Shuji Asai, Michihisa Kohno, Hirokazu Oikawa, Hiroaki Tsutsui, Tadashi Maeda

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

Abstract

An ECL-compatible 10-Gbps GaAs 8:1 multiplexer (MUX) and 1:8 demultiplexer (DEMUX) has been developed. To decrease power consumption and to maximize phase margin, the clock-generating circuit employs source-coupled FET logic (SCFL) circuits. Also, cascade-connected source-follower circuits are used in the clock buffer. These circuits can reduce the power consumption when the fan-out number is large. Direct coupled FET logic (DCFL) circuits are employed for the 2:1 MUX/1:2 DEMUX circuits operating below 5 Gbps. The ICs, which are mounted on ceramic packages, operate at up to 10 Gbps with a power consumption of 1.2 W for the MUX and 1.0 W for the DEMUX at ECL-compatible supply voltages. These power-consumption values are one-third of the previously reported values.

Original languageEnglish
Title of host publicationIEEE-CAS Region 8 Workshop on Analog and Mixed IC Design, Proceedings
PublisherIEEE
Pages113-116
Number of pages4
Publication statusPublished - 1997
Externally publishedYes
EventProceedings of the 1997 19th Annual GaAs IC Symposium - Anaheim, CA, USA
Duration: 1997 Oct 121997 Oct 15

Other

OtherProceedings of the 1997 19th Annual GaAs IC Symposium
CityAnaheim, CA, USA
Period97/10/1297/10/15

Fingerprint

Electric power utilization
Emitter coupled logic circuits
Networks (circuits)
Logic circuits
Field effect transistors
Clocks
Fans
Electric potential

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Yoshida, N., Fujii, M., Atsumo, T., Numata, K., Asai, S., Kohno, M., ... Maeda, T. (1997). Low-power-consumption 10-Gbps GaAs 8: 1 multiplexer/1:8 demultiplexer. In IEEE-CAS Region 8 Workshop on Analog and Mixed IC Design, Proceedings (pp. 113-116). IEEE.

Low-power-consumption 10-Gbps GaAs 8 : 1 multiplexer/1:8 demultiplexer. / Yoshida, Nobuhide; Fujii, Masahiro; Atsumo, Takao; Numata, Keiichi; Asai, Shuji; Kohno, Michihisa; Oikawa, Hirokazu; Tsutsui, Hiroaki; Maeda, Tadashi.

IEEE-CAS Region 8 Workshop on Analog and Mixed IC Design, Proceedings. IEEE, 1997. p. 113-116.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Yoshida, N, Fujii, M, Atsumo, T, Numata, K, Asai, S, Kohno, M, Oikawa, H, Tsutsui, H & Maeda, T 1997, Low-power-consumption 10-Gbps GaAs 8: 1 multiplexer/1:8 demultiplexer. in IEEE-CAS Region 8 Workshop on Analog and Mixed IC Design, Proceedings. IEEE, pp. 113-116, Proceedings of the 1997 19th Annual GaAs IC Symposium, Anaheim, CA, USA, 97/10/12.
Yoshida N, Fujii M, Atsumo T, Numata K, Asai S, Kohno M et al. Low-power-consumption 10-Gbps GaAs 8: 1 multiplexer/1:8 demultiplexer. In IEEE-CAS Region 8 Workshop on Analog and Mixed IC Design, Proceedings. IEEE. 1997. p. 113-116
Yoshida, Nobuhide ; Fujii, Masahiro ; Atsumo, Takao ; Numata, Keiichi ; Asai, Shuji ; Kohno, Michihisa ; Oikawa, Hirokazu ; Tsutsui, Hiroaki ; Maeda, Tadashi. / Low-power-consumption 10-Gbps GaAs 8 : 1 multiplexer/1:8 demultiplexer. IEEE-CAS Region 8 Workshop on Analog and Mixed IC Design, Proceedings. IEEE, 1997. pp. 113-116
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abstract = "An ECL-compatible 10-Gbps GaAs 8:1 multiplexer (MUX) and 1:8 demultiplexer (DEMUX) has been developed. To decrease power consumption and to maximize phase margin, the clock-generating circuit employs source-coupled FET logic (SCFL) circuits. Also, cascade-connected source-follower circuits are used in the clock buffer. These circuits can reduce the power consumption when the fan-out number is large. Direct coupled FET logic (DCFL) circuits are employed for the 2:1 MUX/1:2 DEMUX circuits operating below 5 Gbps. The ICs, which are mounted on ceramic packages, operate at up to 10 Gbps with a power consumption of 1.2 W for the MUX and 1.0 W for the DEMUX at ECL-compatible supply voltages. These power-consumption values are one-third of the previously reported values.",
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AU - Asai, Shuji

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