Abstract
A low power consumption AMF (Analog Matched Filter) is proposed which utilizes capacitor Multiply and capacitor Accumulation operations. High speed - high precision A/D converter is unnecessary because the proposed circuit directly samples received analog signal. The code shifting MF structure is used to prevent error from accumulating. A 15-tap AMF circuit was fabricated using CMOS process. Power consumption for 128-tap circuit is estimated as 2.35mW@25MHz 3.3V. The area is estimated as 1.6mm2 so that the proposed circuit will be applicable LSI for mobile terminals.
Original language | English |
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Title of host publication | Recent Advances in Circuits, Systems and Signal Processing |
Publisher | World Scientific and Engineering Academy and Society |
Pages | 31-34 |
Number of pages | 4 |
ISBN (Print) | 9608052645 |
Publication status | Published - 2002 Dec 1 |
Externally published | Yes |
Keywords
- Analog circuit
- DS-CDMA
- Matched Filter
- Multiply and Accumulation operation
- Spread spectrum
- Weighted-sum operation
ASJC Scopus subject areas
- Engineering(all)