Low power consumption analog matched filter

Masahiro Sasaki, Takeyasu Sakai, Takashi Matsumoto

Research output: Chapter in Book/Report/Conference proceedingChapter

Abstract

A low power consumption AMF (Analog Matched Filter) is proposed which utilizes capacitor Multiply and capacitor Accumulation operations. High speed - high precision A/D converter is unnecessary because the proposed circuit directly samples received analog signal. The code shifting MF structure is used to prevent error from accumulating. A 15-tap AMF circuit was fabricated using CMOS process. Power consumption for 128-tap circuit is estimated as 2.35mW@25MHz 3.3V. The area is estimated as 1.6mm2 so that the proposed circuit will be applicable LSI for mobile terminals.

Original languageEnglish
Title of host publicationRecent Advances in Circuits, Systems and Signal Processing
PublisherWorld Scientific and Engineering Academy and Society
Pages31-34
Number of pages4
ISBN (Print)9608052645
Publication statusPublished - 2002
Externally publishedYes

Fingerprint

Matched filters
Electric power utilization
Networks (circuits)
Capacitors

Keywords

  • Analog circuit
  • DS-CDMA
  • Matched Filter
  • Multiply and Accumulation operation
  • Spread spectrum
  • Weighted-sum operation

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Sasaki, M., Sakai, T., & Matsumoto, T. (2002). Low power consumption analog matched filter. In Recent Advances in Circuits, Systems and Signal Processing (pp. 31-34). World Scientific and Engineering Academy and Society.

Low power consumption analog matched filter. / Sasaki, Masahiro; Sakai, Takeyasu; Matsumoto, Takashi.

Recent Advances in Circuits, Systems and Signal Processing. World Scientific and Engineering Academy and Society, 2002. p. 31-34.

Research output: Chapter in Book/Report/Conference proceedingChapter

Sasaki, M, Sakai, T & Matsumoto, T 2002, Low power consumption analog matched filter. in Recent Advances in Circuits, Systems and Signal Processing. World Scientific and Engineering Academy and Society, pp. 31-34.
Sasaki M, Sakai T, Matsumoto T. Low power consumption analog matched filter. In Recent Advances in Circuits, Systems and Signal Processing. World Scientific and Engineering Academy and Society. 2002. p. 31-34
Sasaki, Masahiro ; Sakai, Takeyasu ; Matsumoto, Takashi. / Low power consumption analog matched filter. Recent Advances in Circuits, Systems and Signal Processing. World Scientific and Engineering Academy and Society, 2002. pp. 31-34
@inbook{4d85b013c60e44d092a9da7fc8b0346c,
title = "Low power consumption analog matched filter",
abstract = "A low power consumption AMF (Analog Matched Filter) is proposed which utilizes capacitor Multiply and capacitor Accumulation operations. High speed - high precision A/D converter is unnecessary because the proposed circuit directly samples received analog signal. The code shifting MF structure is used to prevent error from accumulating. A 15-tap AMF circuit was fabricated using CMOS process. Power consumption for 128-tap circuit is estimated as 2.35mW@25MHz 3.3V. The area is estimated as 1.6mm2 so that the proposed circuit will be applicable LSI for mobile terminals.",
keywords = "Analog circuit, DS-CDMA, Matched Filter, Multiply and Accumulation operation, Spread spectrum, Weighted-sum operation",
author = "Masahiro Sasaki and Takeyasu Sakai and Takashi Matsumoto",
year = "2002",
language = "English",
isbn = "9608052645",
pages = "31--34",
booktitle = "Recent Advances in Circuits, Systems and Signal Processing",
publisher = "World Scientific and Engineering Academy and Society",

}

TY - CHAP

T1 - Low power consumption analog matched filter

AU - Sasaki, Masahiro

AU - Sakai, Takeyasu

AU - Matsumoto, Takashi

PY - 2002

Y1 - 2002

N2 - A low power consumption AMF (Analog Matched Filter) is proposed which utilizes capacitor Multiply and capacitor Accumulation operations. High speed - high precision A/D converter is unnecessary because the proposed circuit directly samples received analog signal. The code shifting MF structure is used to prevent error from accumulating. A 15-tap AMF circuit was fabricated using CMOS process. Power consumption for 128-tap circuit is estimated as 2.35mW@25MHz 3.3V. The area is estimated as 1.6mm2 so that the proposed circuit will be applicable LSI for mobile terminals.

AB - A low power consumption AMF (Analog Matched Filter) is proposed which utilizes capacitor Multiply and capacitor Accumulation operations. High speed - high precision A/D converter is unnecessary because the proposed circuit directly samples received analog signal. The code shifting MF structure is used to prevent error from accumulating. A 15-tap AMF circuit was fabricated using CMOS process. Power consumption for 128-tap circuit is estimated as 2.35mW@25MHz 3.3V. The area is estimated as 1.6mm2 so that the proposed circuit will be applicable LSI for mobile terminals.

KW - Analog circuit

KW - DS-CDMA

KW - Matched Filter

KW - Multiply and Accumulation operation

KW - Spread spectrum

KW - Weighted-sum operation

UR - http://www.scopus.com/inward/record.url?scp=4944261849&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=4944261849&partnerID=8YFLogxK

M3 - Chapter

SN - 9608052645

SP - 31

EP - 34

BT - Recent Advances in Circuits, Systems and Signal Processing

PB - World Scientific and Engineering Academy and Society

ER -