Low-power-consumption direct-conversion CMOS transceiver for multi-standard 5-GHz wireless LAN systems with channel bandwidths of 5-20 MHz

Tadashi Maeda, Hitoshi Yano, Shinichi Hori, Noriaki Matsuno, Tomoyuki Yamase, Takashi Tokairin, Robert Walkington, Nobuhide Yoshida, Keiichi Numata, Kiyoshi Yanagisawa, Yuji Takahashi, Masahiro Fujii, Hikaru Hida

Research output: Contribution to journalArticle

41 Citations (Scopus)

Abstract

This paper describes a low-power-consumption direct-conversion CMOS transceiver for WLAN systems operating at 4.9-5.95 GHz. Its power consumption is reduced by using a resonator-switching wide-dynamic-range LNA. The broad tuning range needed for multiple-channel-bandwidth systems is provided by a single widely tunable low-pass filter based on negative-source-degeneration-resistor transconductors, and its automatic frequency-band-selection PLL supports multiple standard 5-GHz WLAN systems. The system noise figure is 4.4 dB at a maximum gain of 74 dB, and the receiver IIP3 is +5 dBm and -21 dBm for the minimum and maximum gain modes, respectively. The error vector magnitude (EVM) of the transmitted signal is 2.6%. The current consumption is extremely low, 65 mA in the transmitter path and 60 mA in the receiver path.

Original languageEnglish
Pages (from-to)375-382
Number of pages8
JournalIEEE Journal of Solid-State Circuits
Volume41
Issue number2
DOIs
Publication statusPublished - 2006 Feb 1

Keywords

  • CMOS transceiver
  • Frequency synthesizer
  • HiSWANa
  • HiperLAN/2
  • IEEE 802.11a
  • Low-noise amplifier (LNA)
  • Low-pass filter (LFF)
  • Orthogonal frequency division multiplexing (OFDM)
  • Wireless LAN (WLAN)

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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    Maeda, T., Yano, H., Hori, S., Matsuno, N., Yamase, T., Tokairin, T., Walkington, R., Yoshida, N., Numata, K., Yanagisawa, K., Takahashi, Y., Fujii, M., & Hida, H. (2006). Low-power-consumption direct-conversion CMOS transceiver for multi-standard 5-GHz wireless LAN systems with channel bandwidths of 5-20 MHz. IEEE Journal of Solid-State Circuits, 41(2), 375-382. https://doi.org/10.1109/JSSC.2005.862339