Measurement and analysis of anti-resonance peak in total PDN impedance

Sho Kiyoshige, Wataru Ichimura, Masahiro Terasaki, Ryota Kobayashi, Genki Kubo, Hiroki Otsuka, Toshio Sudo

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

Power integrity is a serious issue in the modern CMOS digital systems, because power supply noise excited in core circuits induces logic instability and electromagnetic radiation. Therefore, chip-package co-design is becoming important by taking into consideration the total impedance of power distribution network (PDN) seen from the chip. Especially, parallel resonance peaks in the PDN due to the chip-package interaction induces the unwanted power supply fluctuation, and results in the degradation of signal integrity and electromagnetic interference (EMI). In this paper, effects of critical damping condition for the total PDN impedance on power supply noise has been studied by adding different RC circuit to the intrinsic on-die RC circuit of chip. Three test chips were assumed to be designed with different on-chip PDN properties. The measurement and analysis of power supply noises for the three test chips showed typical characteristics of oscillatory region and damped regions The critical damping condition against the anti-resonance peak has been proved to be effective to suppress the power supply noise on the chip.

Original languageEnglish
Title of host publicationIEEE International Symposium on Electromagnetic Compatibility
Pages931-936
Number of pages6
Publication statusPublished - 2013
Event2013 International Symposium on Electromagnetic Compatibility, EMC Europe 2013 - Brugge
Duration: 2013 Sep 22013 Sep 6

Other

Other2013 International Symposium on Electromagnetic Compatibility, EMC Europe 2013
CityBrugge
Period13/9/213/9/6

Fingerprint

Electric power distribution
chips
impedance
power supplies
Damping
RC circuits
Networks (circuits)
Logic circuits
Signal interference
Electric power systems
Electromagnetic waves
integrity
damping
adding circuits
Degradation
logic circuits
digital systems
electromagnetic interference
CMOS
electromagnetic radiation

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Condensed Matter Physics

Cite this

Kiyoshige, S., Ichimura, W., Terasaki, M., Kobayashi, R., Kubo, G., Otsuka, H., & Sudo, T. (2013). Measurement and analysis of anti-resonance peak in total PDN impedance. In IEEE International Symposium on Electromagnetic Compatibility (pp. 931-936). [6653435]

Measurement and analysis of anti-resonance peak in total PDN impedance. / Kiyoshige, Sho; Ichimura, Wataru; Terasaki, Masahiro; Kobayashi, Ryota; Kubo, Genki; Otsuka, Hiroki; Sudo, Toshio.

IEEE International Symposium on Electromagnetic Compatibility. 2013. p. 931-936 6653435.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Kiyoshige, S, Ichimura, W, Terasaki, M, Kobayashi, R, Kubo, G, Otsuka, H & Sudo, T 2013, Measurement and analysis of anti-resonance peak in total PDN impedance. in IEEE International Symposium on Electromagnetic Compatibility., 6653435, pp. 931-936, 2013 International Symposium on Electromagnetic Compatibility, EMC Europe 2013, Brugge, 13/9/2.
Kiyoshige S, Ichimura W, Terasaki M, Kobayashi R, Kubo G, Otsuka H et al. Measurement and analysis of anti-resonance peak in total PDN impedance. In IEEE International Symposium on Electromagnetic Compatibility. 2013. p. 931-936. 6653435
Kiyoshige, Sho ; Ichimura, Wataru ; Terasaki, Masahiro ; Kobayashi, Ryota ; Kubo, Genki ; Otsuka, Hiroki ; Sudo, Toshio. / Measurement and analysis of anti-resonance peak in total PDN impedance. IEEE International Symposium on Electromagnetic Compatibility. 2013. pp. 931-936
@inproceedings{622877894be24a3cb5ff7d6c9842fa1d,
title = "Measurement and analysis of anti-resonance peak in total PDN impedance",
abstract = "Power integrity is a serious issue in the modern CMOS digital systems, because power supply noise excited in core circuits induces logic instability and electromagnetic radiation. Therefore, chip-package co-design is becoming important by taking into consideration the total impedance of power distribution network (PDN) seen from the chip. Especially, parallel resonance peaks in the PDN due to the chip-package interaction induces the unwanted power supply fluctuation, and results in the degradation of signal integrity and electromagnetic interference (EMI). In this paper, effects of critical damping condition for the total PDN impedance on power supply noise has been studied by adding different RC circuit to the intrinsic on-die RC circuit of chip. Three test chips were assumed to be designed with different on-chip PDN properties. The measurement and analysis of power supply noises for the three test chips showed typical characteristics of oscillatory region and damped regions The critical damping condition against the anti-resonance peak has been proved to be effective to suppress the power supply noise on the chip.",
author = "Sho Kiyoshige and Wataru Ichimura and Masahiro Terasaki and Ryota Kobayashi and Genki Kubo and Hiroki Otsuka and Toshio Sudo",
year = "2013",
language = "English",
isbn = "9781467349796",
pages = "931--936",
booktitle = "IEEE International Symposium on Electromagnetic Compatibility",

}

TY - GEN

T1 - Measurement and analysis of anti-resonance peak in total PDN impedance

AU - Kiyoshige, Sho

AU - Ichimura, Wataru

AU - Terasaki, Masahiro

AU - Kobayashi, Ryota

AU - Kubo, Genki

AU - Otsuka, Hiroki

AU - Sudo, Toshio

PY - 2013

Y1 - 2013

N2 - Power integrity is a serious issue in the modern CMOS digital systems, because power supply noise excited in core circuits induces logic instability and electromagnetic radiation. Therefore, chip-package co-design is becoming important by taking into consideration the total impedance of power distribution network (PDN) seen from the chip. Especially, parallel resonance peaks in the PDN due to the chip-package interaction induces the unwanted power supply fluctuation, and results in the degradation of signal integrity and electromagnetic interference (EMI). In this paper, effects of critical damping condition for the total PDN impedance on power supply noise has been studied by adding different RC circuit to the intrinsic on-die RC circuit of chip. Three test chips were assumed to be designed with different on-chip PDN properties. The measurement and analysis of power supply noises for the three test chips showed typical characteristics of oscillatory region and damped regions The critical damping condition against the anti-resonance peak has been proved to be effective to suppress the power supply noise on the chip.

AB - Power integrity is a serious issue in the modern CMOS digital systems, because power supply noise excited in core circuits induces logic instability and electromagnetic radiation. Therefore, chip-package co-design is becoming important by taking into consideration the total impedance of power distribution network (PDN) seen from the chip. Especially, parallel resonance peaks in the PDN due to the chip-package interaction induces the unwanted power supply fluctuation, and results in the degradation of signal integrity and electromagnetic interference (EMI). In this paper, effects of critical damping condition for the total PDN impedance on power supply noise has been studied by adding different RC circuit to the intrinsic on-die RC circuit of chip. Three test chips were assumed to be designed with different on-chip PDN properties. The measurement and analysis of power supply noises for the three test chips showed typical characteristics of oscillatory region and damped regions The critical damping condition against the anti-resonance peak has been proved to be effective to suppress the power supply noise on the chip.

UR - http://www.scopus.com/inward/record.url?scp=84890742491&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84890742491&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:84890742491

SN - 9781467349796

SP - 931

EP - 936

BT - IEEE International Symposium on Electromagnetic Compatibility

ER -