Measurement and analysis of SSN and Jitter of FPGA

Haruya Fujita, Yo Iijima, Toshio Sudo

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Parasitic inductance that exists in a package induces SSN (Simultaneous Switching Noise) and timing jitter. These noises cause malfunction of LSI and systems. The goal of this paper is to clarify the influence of the effective inductance of the package including mutual inductance by changing the number of simultaneously switching buffers and alternating adjacent buffers in the reverse direction each other. In this study, measured SSNs were reproduced by HSPICE simulation. The whole simulation model consisted of on-chip PDN (Power Distribution Network), package PDN and board PDN, along with I/O buffer model. The simulated SSN waveforms agreed well with the measured results.

Original languageEnglish
Title of host publicationEMC EUROPE 2012 - International Symposium on Electromagnetic Compatibility, Proceedings
DOIs
Publication statusPublished - 2012 Dec 1
EventInternational Symposium on Electromagnetic Compatibility, EMC EUROPE 2012 - Rome, Italy
Duration: 2012 Sep 172012 Sep 21

Publication series

NameIEEE International Symposium on Electromagnetic Compatibility
ISSN (Print)1077-4076
ISSN (Electronic)2158-1118

Conference

ConferenceInternational Symposium on Electromagnetic Compatibility, EMC EUROPE 2012
CountryItaly
CityRome
Period12/9/1712/9/21

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ASJC Scopus subject areas

  • Condensed Matter Physics
  • Electrical and Electronic Engineering

Cite this

Fujita, H., Iijima, Y., & Sudo, T. (2012). Measurement and analysis of SSN and Jitter of FPGA. In EMC EUROPE 2012 - International Symposium on Electromagnetic Compatibility, Proceedings [6396872] (IEEE International Symposium on Electromagnetic Compatibility). https://doi.org/10.1109/EMCEurope.2012.6396872