Multi-path analog circuits robust to digital substrate noise

Shigetaka Takagi; Retdian Agung Nicodimus; Kazuyuki Wada; Takahide Sato; Nobuo Fujii

doi:10.1093/ietfec/e91-a.2.535

Multi-path analog circuits robust to digital substrate noise

Shigetaka Takagi, Retdian Agung Nicodimus, Kazuyuki Wada, Takahide Sato, Nobuo Fujii

Research output: Contribution to journal › Article

1 Citation (Scopus)

Abstract

A multi-path structure is proposed for reduction in effect of digital substrate noise which degrades analog circuit performance. As an example low-pass filters are implemented in a 0.18-μm CMOS process. 11-dBm reduction in digital substrate noise is achieved as compared with a conventional structure.

Original language	English
Pages (from-to)	535-541
Number of pages	7
Journal	IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Volume	E91-A
Issue number	2
DOIs	https://doi.org/10.1093/ietfec/e91-a.2.535
Publication status	Published - 2008 Jan 1
Externally published	Yes

Keywords

Balanced-type circuit
Digital substrate noise
Low-pass filter
Multi-path structure

ASJC Scopus subject areas

Signal Processing
Computer Graphics and Computer-Aided Design
Electrical and Electronic Engineering
Applied Mathematics

Access to Document

10.1093/ietfec/e91-a.2.535

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Takagi, S., Nicodimus, R. A., Wada, K., Sato, T., & Fujii, N. (2008). Multi-path analog circuits robust to digital substrate noise. IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E91-A(2), 535-541. https://doi.org/10.1093/ietfec/e91-a.2.535

@article{b696a199c51f4b13b3ea9786943d32d8,

title = "Multi-path analog circuits robust to digital substrate noise",

abstract = "A multi-path structure is proposed for reduction in effect of digital substrate noise which degrades analog circuit performance. As an example low-pass filters are implemented in a 0.18-μm CMOS process. 11-dBm reduction in digital substrate noise is achieved as compared with a conventional structure.",

keywords = "Balanced-type circuit, Digital substrate noise, Low-pass filter, Multi-path structure",

author = "Shigetaka Takagi and Nicodimus, {Retdian Agung} and Kazuyuki Wada and Takahide Sato and Nobuo Fujii",

year = "2008",

month = jan,

day = "1",

doi = "10.1093/ietfec/e91-a.2.535",

language = "English",

volume = "E91-A",

pages = "535--541",

journal = "IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences",

issn = "0916-8508",

publisher = "Maruzen Co., Ltd/Maruzen Kabushikikaisha",

number = "2",

}

TY - JOUR

T1 - Multi-path analog circuits robust to digital substrate noise

AU - Takagi, Shigetaka

AU - Nicodimus, Retdian Agung

AU - Wada, Kazuyuki

AU - Sato, Takahide

AU - Fujii, Nobuo

PY - 2008/1/1

Y1 - 2008/1/1

N2 - A multi-path structure is proposed for reduction in effect of digital substrate noise which degrades analog circuit performance. As an example low-pass filters are implemented in a 0.18-μm CMOS process. 11-dBm reduction in digital substrate noise is achieved as compared with a conventional structure.

AB - A multi-path structure is proposed for reduction in effect of digital substrate noise which degrades analog circuit performance. As an example low-pass filters are implemented in a 0.18-μm CMOS process. 11-dBm reduction in digital substrate noise is achieved as compared with a conventional structure.

KW - Balanced-type circuit

KW - Digital substrate noise

KW - Low-pass filter

KW - Multi-path structure

UR - http://www.scopus.com/inward/record.url?scp=70350197517&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=70350197517&partnerID=8YFLogxK

U2 - 10.1093/ietfec/e91-a.2.535

DO - 10.1093/ietfec/e91-a.2.535

M3 - Article

AN - SCOPUS:70350197517

VL - E91-A

SP - 535

EP - 541

JO - IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

JF - IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

SN - 0916-8508

IS - 2

ER -