NEW TRENCH ISOLATION TECHNOLOGY AS A REPLACEMENT OF LOCOS.

H. Mikoshiba, T. Homma, K. Hamano

Research output: Contribution to journalConference article

Abstract

The technology, which is suitable for submicron VLSI, features bird's beak free, planar surface, low defect generation, and is adaptable to any isolation width from submicron to very large dimensions. The key process steps consist of filling the trench with polysilicon to half of the trench depth by utilizing photoresist etch back, and subsequent full oxidation of the recessed polysilicon to fill the trench by the oxide. Device characteristics examined experimentally are equivalent to those of LOCOS isolated devices. The feasibility of this technology has been verified successfully by fabricating a 64K bit DRAM.

Original languageEnglish
Pages (from-to)578-581
Number of pages4
JournalTechnical Digest - International Electron Devices Meeting
Publication statusPublished - 1984 Dec 1

    Fingerprint

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

Cite this