Abstract
This paper describes an approach to combine spintransfer torque Magnetic Tunnel Junction (MTJ) based non-volatile flip-flops (NVFFs) with power gating techniques to enable anytime power-off and instant power-on. We analyzed the NVFFs which are expected to realize nonvolatile power gating (NVPG) for a microprocessor. We evaluated the NVFFs by the area, the performance and the energy dissipation. We also investigated effectiveness of NVPG that combines the NVFFs with the 32-bit microprocessor core. The simulation results showed that the NVPG reduced more energy dissipation when the idle time of the microprocessor is longer than 5ms at 25°C as compared with the conventional SRAM-backup scheme. Additionally, the NVPG was able to reduce more energy dissipation at higher temperature.
| Original language | English |
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| Title of host publication | NVMSA 2017 - 6th IEEE Non-Volatile Memory Systems and Applications Symposium |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| ISBN (Electronic) | 9781538617687 |
| DOIs | |
| Publication status | Published - 2017 Oct 10 |
| Externally published | Yes |
| Event | 6th IEEE Non-Volatile Memory Systems and Applications Symposium, NVMSA 2017 - Hsinchu, Taiwan, Province of China Duration: 2017 Aug 16 → 2017 Aug 18 |
Other
| Other | 6th IEEE Non-Volatile Memory Systems and Applications Symposium, NVMSA 2017 |
|---|---|
| Country | Taiwan, Province of China |
| City | Hsinchu |
| Period | 17/8/16 → 17/8/18 |
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Keywords
- Low Power
- Magnetic Tunnel Junction
- Nonvolatile Flip Flop
- Power Gating
ASJC Scopus subject areas
- Hardware and Architecture