Numerical analysis of pulsed I-V curves and current collapse in GaN FETs as affected by buffer trapping

H. Nakano, H. Takayanagi, K. Yonemoto, K. Horio

Research output: Contribution to journalConference article

Abstract

Two-dimensional transient analysis of GaN MESFETs is performed in which a three-level compensation model is adopted for a semi-insulating buffer layer, where a shallow donor, a deep donor and a deep acceptor are considered. Quasi-pulsed I-V curves are derived from the transient characteristics, and are compared with the steady-state I-V curves. It is shown that so-called current collapse or current reduction is more pronounced when the deep-acceptor density in the buffer layer is higher and when an off-state drain voltage is higher, because the trapping effects become more significant. It is suggested that to minimize current collapse in GaN-based FETs, an acceptor density in a semi-insulating GaN layer should be made low, although the current cutoff behaviour may be degraded.

Original languageEnglish
Article numberH.2
Pages (from-to)141-144
Number of pages4
JournalTechnical Digest - IEEE Compound Semiconductor Integrated Circuit Symposium, CSIC
DOIs
Publication statusPublished - 2005 Dec 1
Event2005 IEEE Compound Semiconductor Integrated Circuit Symposium, CSIC - Palm Springs, CA, United States
Duration: 2005 Oct 302005 Nov 2

Keywords

  • Current collapse
  • Deep level
  • Device simulation
  • FET
  • GaN

ASJC Scopus subject areas

  • Engineering(all)

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