Open-loop full CMOS 103 MHz -61 dB THD S/H circuit

Khayrollah Hadidi, Masahiro Sasaki, Tadatoshi Watanabe, Daigo Muramatsu, Takashi Matsumoto

Research output: Chapter in Book/Report/Conference proceedingConference contribution

19 Citations (Scopus)

Abstract

Based on a real open loop architecture and a cascode-driver CMOS source-follower, we implemented a S/H circuit in a 0.8 μm digital CMOS process. The circuit achieved -61 dB THD at a sampling rate of 103 MHz, while a 1.42 V p-p 10 MHz input signal was applied. This includes all parasitic loading and transient effect.

Original languageEnglish
Title of host publicationProceedings of the Custom Integrated Circuits Conference
Editors Anon
PublisherIEEE
Pages381-383
Number of pages3
Publication statusPublished - 1998
Externally publishedYes
EventProceedings of the 1998 IEEE Custom Integrated Circuits Conference - Santa Clara, CA, USA
Duration: 1998 May 111998 May 14

Other

OtherProceedings of the 1998 IEEE Custom Integrated Circuits Conference
CitySanta Clara, CA, USA
Period98/5/1198/5/14

Fingerprint

Networks (circuits)
Sampling

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Hadidi, K., Sasaki, M., Watanabe, T., Muramatsu, D., & Matsumoto, T. (1998). Open-loop full CMOS 103 MHz -61 dB THD S/H circuit. In Anon (Ed.), Proceedings of the Custom Integrated Circuits Conference (pp. 381-383). IEEE.

Open-loop full CMOS 103 MHz -61 dB THD S/H circuit. / Hadidi, Khayrollah; Sasaki, Masahiro; Watanabe, Tadatoshi; Muramatsu, Daigo; Matsumoto, Takashi.

Proceedings of the Custom Integrated Circuits Conference. ed. / Anon. IEEE, 1998. p. 381-383.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hadidi, K, Sasaki, M, Watanabe, T, Muramatsu, D & Matsumoto, T 1998, Open-loop full CMOS 103 MHz -61 dB THD S/H circuit. in Anon (ed.), Proceedings of the Custom Integrated Circuits Conference. IEEE, pp. 381-383, Proceedings of the 1998 IEEE Custom Integrated Circuits Conference, Santa Clara, CA, USA, 98/5/11.
Hadidi K, Sasaki M, Watanabe T, Muramatsu D, Matsumoto T. Open-loop full CMOS 103 MHz -61 dB THD S/H circuit. In Anon, editor, Proceedings of the Custom Integrated Circuits Conference. IEEE. 1998. p. 381-383
Hadidi, Khayrollah ; Sasaki, Masahiro ; Watanabe, Tadatoshi ; Muramatsu, Daigo ; Matsumoto, Takashi. / Open-loop full CMOS 103 MHz -61 dB THD S/H circuit. Proceedings of the Custom Integrated Circuits Conference. editor / Anon. IEEE, 1998. pp. 381-383
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