Overview on low power SoC design technology

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Abstract

So far, low power design for SoC has mainly focused on techniques to reduce dynamic power and standby leakage power. In further scaled devices, design technology to reduce active leakage power at the operation mode becomes indispensable. This is because the share of leakage power in the total operation power continues to increase as the device gets scaled. This paper gives a brief overview on the conventional leakage reduction techniques and describes novel approaches to use run-time power gating for active leakage reduction.

Original languageEnglish
Title of host publicationProceedings of the ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007
Pages634-636
Number of pages3
DOIs
Publication statusPublished - 2007 Dec 1
EventASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007 - Yokohama, Japan
Duration: 2007 Jan 232007 Jan 27

Publication series

NameProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Conference

ConferenceASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007
CountryJapan
CityYokohama
Period07/1/2307/1/27

ASJC Scopus subject areas

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

Cite this

Usami, K. (2007). Overview on low power SoC design technology. In Proceedings of the ASP-DAC 2007 - Asia and South Pacific Design Automation Conference 2007 (pp. 634-636). [4196103] (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC). https://doi.org/10.1109/ASPDAC.2007.358057