Performance enhancement on digital signal processors with complex arithmetic capability

Yoshimasa Negishi, Eiji Watanabe

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

Digital Signal Processors with complex arithmetic capability (DSP-C) are useful for various applications. In this paper, we propose a method for the effective implementation of specific circuits with real coefficients on DSP-C. DSPC has special hardware such as a complex multiplier so that a complex calculation can be performed with only one instruction. First, we show that nodes with two real coefficient input branches can be implemented by complex multiplications. We apply this implementation to 2D circuits and transversal circuits with real coefficients. Next, we introduce a new computational mode (Advanced mode) and a new multiplier into PSI, a kind of DSP-C which has been proposed already, in order to process the circuits effectively. The effectiveness of the proposed method is shown by simulation in the last part.

Original languageEnglish
Pages (from-to)238-244
Number of pages7
JournalIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
VolumeE82-A
Issue number2
Publication statusPublished - 1999

Fingerprint

Digital signal processors
Networks (circuits)
Hardware

Keywords

  • Complex multiplier
  • Complex signal processing
  • Digital filter
  • Digital signal processing
  • Digital signal processor

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Hardware and Architecture
  • Information Systems

Cite this

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