Physics-based simulation of buffer-trapping effects on slow current transients and current collapse in GaN field effect transistors

Kazushige Horio, Ken Yonemoto, Hiroki Takayanagi, Hiroyuki Nakano

Research output: Contribution to journalReview article

78 Citations (Scopus)

Abstract

Two-dimensional transient analyses of GaN metal-semiconductor field effect transistors (MESFETs) are performed in which a three level compensation model is adopted for a semi-insulating buffer layer, where a shallow donor, a deep donor, and a deep acceptor are included. Quasipulsed current-voltage (I-V) curves are derived from the transient characteristics and are compared with steady-state I-V curves. It is shown that when the drain voltage VD is raised abruptly, the drain current ID overshoots the steady-state value, and when VD is lowered abruptly, ID remains at a low value for some periods, showing drain-lag behavior. These are explained by the deep donor's electron capturing and electron emission processes quantitatively. The drain lag could be a major cause of current collapse, although some gate lag is also seen due to the buffer layer. The current collapse is shown to be more pronounced when the deep-acceptor density in the buffer layer is higher and when an off-state drain voltage is higher, because the change of ionized deep-donor density becomes larger and hence the trapping effects become more significant. It is suggested that to minimize the current collapse in GaN-based FETs, an acceptor density in a semi-insulating layer should be made low, although the current cutoff behavior may be degraded.

Original languageEnglish
Article number124502
JournalJournal of Applied Physics
Volume98
Issue number12
DOIs
Publication statusPublished - 2005 Dec 1

ASJC Scopus subject areas

  • Physics and Astronomy(all)

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