Prediction of thermal fatigue life for encapsulated flip chip interconnection

Kazuhide Doi, Naohiko Hirano, Takashi Okada, Yoichi Hiruta, Toshio Sudo, Minoru Mukai

Research output: Contribution to journalArticle

34 Citations (Scopus)

Abstract

The thermal fatigue life of eutectic (Pb63Sn) solder bumps for encapsulated flip chip interconnections was investigated by a Temperature Cycling Test (TCT) using three types of substrates (FR-4, Al2O3, and AlN) and three kinds of encapsulants having different Young's modulus and CTE (Coefficient of Thermal Expansion, α). The bump height was changed from 20 to 80 μm in this test. The strain ranges in the solder bumps during TCT were characterized by FEM (Finite Element Method) simulation using two types of models. The whole flip chip structure model was used to analyze the deformation of the solder bumps and the unit bump model was used to analyze the plastic strain range distribution in the solder bumps. The relationship between Nf50 and the average strain range of the eutectic solder bumps could be represented by an equation based on the Coffin-Manson relation. The thermal fatigue life of the eutectic solder bumps for encapsulated flip chip interconnections was found to be proportional to the bump height and the Young's modulus of the encapsulant.

Original languageEnglish
Pages (from-to)231-236
Number of pages6
JournalInternational Journal of Microcircuits and Electronic Packaging
Volume19
Issue number3
Publication statusPublished - 1996 Sep 1

Keywords

  • Eutectic Solder Bump
  • Flip Chip Interconnection
  • Thermal Fatigue Life

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Safety, Risk, Reliability and Quality
  • Electrical and Electronic Engineering

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  • Cite this

    Doi, K., Hirano, N., Okada, T., Hiruta, Y., Sudo, T., & Mukai, M. (1996). Prediction of thermal fatigue life for encapsulated flip chip interconnection. International Journal of Microcircuits and Electronic Packaging, 19(3), 231-236.