Process/ pad effects on electrical and physical properties of CMP copper damascene interconnects

J-F.Wang J-F.Wang, A.R.Sethuraman A.R.Sethuraman, L.Cook L.Cook, K.Ueno K.Ueno, Y.Tsuchiya Y.Tsuchiya, Kazuyoshi Ueno

Research output: Contribution to journalArticle

Original languageEnglish
Pages (from-to)387-392
JournalProceedings of 1996 VLSI Multilevel Interconnection Conference
Publication statusPublished - 1996 May 1

Cite this

J-F.Wang, J-F. W., A.R.Sethuraman, A. R. S., L.Cook, L. C., K.Ueno, K. U., Y.Tsuchiya, Y. T., & Ueno, K. (1996). Process/ pad effects on electrical and physical properties of CMP copper damascene interconnects. Proceedings of 1996 VLSI Multilevel Interconnection Conference, 387-392.

Process/ pad effects on electrical and physical properties of CMP copper damascene interconnects. / J-F.Wang, J-F.Wang; A.R.Sethuraman, A.R.Sethuraman; L.Cook, L.Cook; K.Ueno, K.Ueno; Y.Tsuchiya, Y.Tsuchiya; Ueno, Kazuyoshi.

In: Proceedings of 1996 VLSI Multilevel Interconnection Conference, 01.05.1996, p. 387-392.

Research output: Contribution to journalArticle

J-F.Wang, J-F.Wang ; A.R.Sethuraman, A.R.Sethuraman ; L.Cook, L.Cook ; K.Ueno, K.Ueno ; Y.Tsuchiya, Y.Tsuchiya ; Ueno, Kazuyoshi. / Process/ pad effects on electrical and physical properties of CMP copper damascene interconnects. In: Proceedings of 1996 VLSI Multilevel Interconnection Conference. 1996 ; pp. 387-392.
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