Q factor damping of anti-resonance peak by variable on-die capacitance

Wataru Ichimura, Sho Kiyoshige, Masahiro Terasaki, Hiroki Otsuka, Toshio Sudo

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

Power supply noise has been becoming critical in advanced CMOS digital systems, because power supply noise induces false logic operation and instability. Especially, anti-resonance peaks in power distribution network (PDN) due to the chip-package interaction induce the unwanted power supply fluctuation. In this paper, power supply noises and total impedances of power distribution network (PDN) for the variable structure of on-die capacitances have been examined. In addition, Q factors of anti-resonance peaks for various PDN impedances have been examined by changing the value of on-die capacitance. As a result, it has been proved that Q factors of anti-resonance peaks can be suppressed by increasing on-die capacitance. Furthermore, power supply noise distribution on a chip has been simulated for the various location of noise generating circuits and on-die capacitance.

Original languageEnglish
Title of host publicationIEEE International Symposium on Electromagnetic Compatibility
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1049-1053
Number of pages5
ISBN (Electronic)9781479932252
DOIs
Publication statusPublished - 2014 Oct 20
Event2014 International Symposium on Electromagnetic Compatibility, EMC Europe 2014 - Gothenburg, Sweden
Duration: 2014 Sep 12014 Sep 4

Publication series

NameIEEE International Symposium on Electromagnetic Compatibility
ISSN (Print)1077-4076
ISSN (Electronic)2158-1118

Conference

Conference2014 International Symposium on Electromagnetic Compatibility, EMC Europe 2014
CountrySweden
CityGothenburg
Period14/9/114/9/4

Keywords

  • Anti-resonance peaks
  • Co-design
  • Power integrity
  • Power supply noises
  • Q factor

ASJC Scopus subject areas

  • Condensed Matter Physics
  • Electrical and Electronic Engineering

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  • Cite this

    Ichimura, W., Kiyoshige, S., Terasaki, M., Otsuka, H., & Sudo, T. (2014). Q factor damping of anti-resonance peak by variable on-die capacitance. In IEEE International Symposium on Electromagnetic Compatibility (pp. 1049-1053). [6931057] (IEEE International Symposium on Electromagnetic Compatibility). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/EMCEurope.2014.6931057