Simulation of current slump removal in field-plate GaAs MESFETs

A. Nomoto; Y. Sato; Kazushige Horio

Simulation of current slump removal in field-plate GaAs MESFETs

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Two-dimensional transient analysis of field-plate GaAs MESFETs is performed by considering surface states in the region from the gate toward the drain. The field-plate length L_FP and the thickness of SiO₂ passivation layer d are varied as parameters. It is shown that the drain lag and current slump are reduced by introducing a field plate longer than the length of surface-state region L_s, but they are not removed completely when d is thick. It is clearly shown that when d becomes very thin (≤ 0.02 μm), the lags and current slump are completely removed for L_FP longer than L_s. By carefully examining the L_FP dependence for d = 0.02 μm, it is found that they are completely removed even if L_FP is comparable to L_s.

Original language	English
Title of host publication	NSTI: Advanced Manufacturing, Electronics and Microsystems - TechConnect Briefs 2015
Publisher	Taylor and Francis Inc.
Pages	270-273
Number of pages	4
Volume	4
ISBN (Electronic)	9781498747301
Publication status	Published - 2015
Event	10th Annual TechConnect World Innovation Conference and Expo, Held Jointly with the 18th Annual Nanotech Conference and Expo, and the 2015 National SBIR/STTR Conference - Washington, United States Duration: 2015 Jun 14 → 2015 Jun 17

Other

Other	10th Annual TechConnect World Innovation Conference and Expo, Held Jointly with the 18th Annual Nanotech Conference and Expo, and the 2015 National SBIR/STTR Conference
Country	United States
City	Washington
Period	15/6/14 → 15/6/17

Keywords

Current slump
Drain lag
GaAs FET
Gate lag
Surface state

ASJC Scopus subject areas

Surfaces, Coatings and Films
Fluid Flow and Transfer Processes
Biotechnology
Fuel Technology

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Nomoto, A., Sato, Y., & Horio, K. (2015). Simulation of current slump removal in field-plate GaAs MESFETs. In NSTI: Advanced Manufacturing, Electronics and Microsystems - TechConnect Briefs 2015 (Vol. 4, pp. 270-273). Taylor and Francis Inc..

Nomoto, A, Sato, Y & Horio, K 2015, Simulation of current slump removal in field-plate GaAs MESFETs. in NSTI: Advanced Manufacturing, Electronics and Microsystems - TechConnect Briefs 2015. vol. 4, Taylor and Francis Inc., pp. 270-273, 10th Annual TechConnect World Innovation Conference and Expo, Held Jointly with the 18th Annual Nanotech Conference and Expo, and the 2015 National SBIR/STTR Conference, Washington, United States, 15/6/14.

@inproceedings{853bf4acb6e24526a0ee71d6c30fdfa5,

title = "Simulation of current slump removal in field-plate GaAs MESFETs",

abstract = "Two-dimensional transient analysis of field-plate GaAs MESFETs is performed by considering surface states in the region from the gate toward the drain. The field-plate length LFP and the thickness of SiO2 passivation layer d are varied as parameters. It is shown that the drain lag and current slump are reduced by introducing a field plate longer than the length of surface-state region Ls, but they are not removed completely when d is thick. It is clearly shown that when d becomes very thin (≤ 0.02 μm), the lags and current slump are completely removed for LFP longer than Ls. By carefully examining the LFP dependence for d = 0.02 μm, it is found that they are completely removed even if LFP is comparable to Ls.",

keywords = "Current slump, Drain lag, GaAs FET, Gate lag, Surface state",

author = "A. Nomoto and Y. Sato and Kazushige Horio",

year = "2015",

language = "English",

volume = "4",

pages = "270--273",

booktitle = "NSTI: Advanced Manufacturing, Electronics and Microsystems - TechConnect Briefs 2015",

publisher = "Taylor and Francis Inc.",

note = "10th Annual TechConnect World Innovation Conference and Expo, Held Jointly with the 18th Annual Nanotech Conference and Expo, and the 2015 National SBIR/STTR Conference ; Conference date: 14-06-2015 Through 17-06-2015",

}

TY - GEN

T1 - Simulation of current slump removal in field-plate GaAs MESFETs

AU - Nomoto, A.

AU - Sato, Y.

AU - Horio, Kazushige

PY - 2015

Y1 - 2015

N2 - Two-dimensional transient analysis of field-plate GaAs MESFETs is performed by considering surface states in the region from the gate toward the drain. The field-plate length LFP and the thickness of SiO2 passivation layer d are varied as parameters. It is shown that the drain lag and current slump are reduced by introducing a field plate longer than the length of surface-state region Ls, but they are not removed completely when d is thick. It is clearly shown that when d becomes very thin (≤ 0.02 μm), the lags and current slump are completely removed for LFP longer than Ls. By carefully examining the LFP dependence for d = 0.02 μm, it is found that they are completely removed even if LFP is comparable to Ls.

AB - Two-dimensional transient analysis of field-plate GaAs MESFETs is performed by considering surface states in the region from the gate toward the drain. The field-plate length LFP and the thickness of SiO2 passivation layer d are varied as parameters. It is shown that the drain lag and current slump are reduced by introducing a field plate longer than the length of surface-state region Ls, but they are not removed completely when d is thick. It is clearly shown that when d becomes very thin (≤ 0.02 μm), the lags and current slump are completely removed for LFP longer than Ls. By carefully examining the LFP dependence for d = 0.02 μm, it is found that they are completely removed even if LFP is comparable to Ls.

KW - Current slump

KW - Drain lag

KW - GaAs FET

KW - Gate lag

KW - Surface state

UR - http://www.scopus.com/inward/record.url?scp=84983349629&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84983349629&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:84983349629

VL - 4

SP - 270

EP - 273

BT - NSTI: Advanced Manufacturing, Electronics and Microsystems - TechConnect Briefs 2015

PB - Taylor and Francis Inc.

T2 - 10th Annual TechConnect World Innovation Conference and Expo, Held Jointly with the 18th Annual Nanotech Conference and Expo, and the 2015 National SBIR/STTR Conference

Y2 - 14 June 2015 through 17 June 2015

ER -