Simulation of field-plate effects on surface-state-related lag and current slump in GaAs FETs

T. Tanaka, K. Itagaki, A. Nakajima, Kazushige Horio

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Two-dimensional transient analysis of field-plate GaAs MESFETs is performed in which surface states are considered. Quasi-pulsed current-voltage curves are derived from the transient characteristics. It is shown that drain lag and current slump due to surface states are reduced by introducing a field plate because fixed potential at the field plate leads to reducing trapping effects by the surface states. Dependence of lag phenomena and current slump on field-plate length and SiO2 passivation layer thickness is also studied, suggesting that there are adequate values of field-plate length and SiO2 layer thickness to reduce current slump and also to maintain high-frequency performance of GaAs FETs.

Original languageEnglish
Title of host publicationTechnical Proceedings of the 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011
Pages595-598
Number of pages4
Volume2
Publication statusPublished - 2011
EventNanotechnology 2011: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational - 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011 - Boston, MA
Duration: 2011 Jun 132011 Jun 16

Other

OtherNanotechnology 2011: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational - 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011
CityBoston, MA
Period11/6/1311/6/16

Fingerprint

Surface states
Field effect transistors
Passivation
Transient analysis
Electric potential

Keywords

  • Current slump
  • Drain lag
  • GaAs FET
  • Gate lag
  • Surface state

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Tanaka, T., Itagaki, K., Nakajima, A., & Horio, K. (2011). Simulation of field-plate effects on surface-state-related lag and current slump in GaAs FETs. In Technical Proceedings of the 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011 (Vol. 2, pp. 595-598)

Simulation of field-plate effects on surface-state-related lag and current slump in GaAs FETs. / Tanaka, T.; Itagaki, K.; Nakajima, A.; Horio, Kazushige.

Technical Proceedings of the 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011. Vol. 2 2011. p. 595-598.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Tanaka, T, Itagaki, K, Nakajima, A & Horio, K 2011, Simulation of field-plate effects on surface-state-related lag and current slump in GaAs FETs. in Technical Proceedings of the 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011. vol. 2, pp. 595-598, Nanotechnology 2011: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational - 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011, Boston, MA, 11/6/13.
Tanaka T, Itagaki K, Nakajima A, Horio K. Simulation of field-plate effects on surface-state-related lag and current slump in GaAs FETs. In Technical Proceedings of the 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011. Vol. 2. 2011. p. 595-598
Tanaka, T. ; Itagaki, K. ; Nakajima, A. ; Horio, Kazushige. / Simulation of field-plate effects on surface-state-related lag and current slump in GaAs FETs. Technical Proceedings of the 2011 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2011. Vol. 2 2011. pp. 595-598
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