Simulation of slow current transients and current compression in AlGaAs/GaAs HFETs

H. Ikarashi, K. Kitamura, N. Kurosawa, K. Horio

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

Two-dimensional transient simulations of AlGaAs/GaAs HFETs are performed in which substrate traps and surface states are considered. When the drain voltage is raised abruptly, the drain current overshoots the steady-state value, and when it is lowered abruptly, the drain current remains at a low value, showing drain-lag behavior. Turn-on characteristics are also calculated when both the gate voltage and the drain voltage are changed abruptly, and quasi-pulsed I-V curves are derived from them. It is shown that the drain lag due to substrate traps could become a cause of so-called current compression of the HFETs. It is also shown that gate lag due to surface states could become a major cause of the current compression.

Original languageEnglish
Pages (from-to)357-360
Number of pages4
JournalJournal of Computational Electronics
Volume5
Issue number4
DOIs
Publication statusPublished - 2006 Dec 1

Keywords

  • AlGaAs/GaAs HFET
  • Current compression
  • Drain lag
  • Gate lag
  • Trap

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Atomic and Molecular Physics, and Optics
  • Modelling and Simulation
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Simulation of slow current transients and current compression in AlGaAs/GaAs HFETs'. Together they form a unique fingerprint.

  • Cite this