Simulation of surface and buffer trapping effects on gate lag in AlGaN/GaN HEMTs

Kazushige Horio, A. Nakajima, K. Fujii

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Two-dimensional analysis of turn-on characteristics of AlGaN/GaN HEMTs is performed in which both buffer traps and surface states (traps) are considered. It is studied how so-called gate lag is affected by these traps. It is shown that gate lag due to buffer traps can occur because in the off state, electrons are injected into the buffer layer and captured by the traps. It is also shown that gate lag due to an electron-trap-type surface state can occur only when electron's gate tunneling is considered. Dependence of gate lag on buffer-trap parameters is also studied.

Original languageEnglish
Title of host publicationNanotechnology 2010: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational - Technical Proceedings of the 2010 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2010
Pages693-696
Number of pages4
Volume2
Publication statusPublished - 2010
EventNanotechnology 2010: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational - 2010 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2010 - Anaheim, CA
Duration: 2010 Jun 212010 Jun 24

Other

OtherNanotechnology 2010: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational - 2010 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2010
CityAnaheim, CA
Period10/6/2110/6/24

Fingerprint

Surface states
High electron mobility transistors
Electron traps
Electron tunneling
Buffer layers
Electron energy levels
Electrons

Keywords

  • AlGaN/GaN HEMT
  • Gate lag
  • Gate tunneling
  • Surface state
  • Trap

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Horio, K., Nakajima, A., & Fujii, K. (2010). Simulation of surface and buffer trapping effects on gate lag in AlGaN/GaN HEMTs. In Nanotechnology 2010: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational - Technical Proceedings of the 2010 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2010 (Vol. 2, pp. 693-696)

Simulation of surface and buffer trapping effects on gate lag in AlGaN/GaN HEMTs. / Horio, Kazushige; Nakajima, A.; Fujii, K.

Nanotechnology 2010: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational - Technical Proceedings of the 2010 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2010. Vol. 2 2010. p. 693-696.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Horio, K, Nakajima, A & Fujii, K 2010, Simulation of surface and buffer trapping effects on gate lag in AlGaN/GaN HEMTs. in Nanotechnology 2010: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational - Technical Proceedings of the 2010 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2010. vol. 2, pp. 693-696, Nanotechnology 2010: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational - 2010 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2010, Anaheim, CA, 10/6/21.
Horio K, Nakajima A, Fujii K. Simulation of surface and buffer trapping effects on gate lag in AlGaN/GaN HEMTs. In Nanotechnology 2010: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational - Technical Proceedings of the 2010 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2010. Vol. 2. 2010. p. 693-696
Horio, Kazushige ; Nakajima, A. ; Fujii, K. / Simulation of surface and buffer trapping effects on gate lag in AlGaN/GaN HEMTs. Nanotechnology 2010: Electronics, Devices, Fabrication, MEMS, Fluidics and Computational - Technical Proceedings of the 2010 NSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2010. Vol. 2 2010. pp. 693-696
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