Submicrometer gold interconnect wiring by sidewall electroplating technology

Makoto Hirano, Shinji Aoyama, Kimiyoshi Yamasaki

Research output: Contribution to journalArticle

6 Citations (Scopus)

Abstract

A novel technique for forming submicrometer gold wires is proposed to realize high-density interconnection in LSIs. The wires are fabricated into a structure which is buried in an insulator spacer using sidewall electroplating technology. Optimum plating conditions are studied to achieve good metaling conformability and uniformity. By optimizing the plating conditions, gold interconnect wires with submicrometer linewidth and spacing are formed with good surface planarity of the buried structure.

Original languageEnglish
JournalJapanese Journal of Applied Physics, Part 2: Letters
Volume33
Issue number4 A
Publication statusPublished - 1994 Apr 1
Externally publishedYes

Fingerprint

wiring
electroplating
Electroplating
Electric wiring
Gold
wire
Wire
gold
plating
Plating
large scale integration
Linewidth
spacers
spacing
insulators

ASJC Scopus subject areas

  • Physics and Astronomy (miscellaneous)

Cite this

Submicrometer gold interconnect wiring by sidewall electroplating technology. / Hirano, Makoto; Aoyama, Shinji; Yamasaki, Kimiyoshi.

In: Japanese Journal of Applied Physics, Part 2: Letters, Vol. 33, No. 4 A, 01.04.1994.

Research output: Contribution to journalArticle

Hirano, Makoto ; Aoyama, Shinji ; Yamasaki, Kimiyoshi. / Submicrometer gold interconnect wiring by sidewall electroplating technology. In: Japanese Journal of Applied Physics, Part 2: Letters. 1994 ; Vol. 33, No. 4 A.
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