Suppression of anti-resonance peaks by controlling off-chip damping parameters

Yoh Iijima, Toshio Sudo, Tomohiro Kinoshita, Kazuhide Uriu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Simultaneous switching noise (SSN) is a serious design issue to stabilize power supply integrity and logic operation in advanced CMOS circuits and systems. Furthermore, SSN causes electromagnetic interference (EMI). Ringing frequency observed in the SSN waveforms is strongly related to the anti-resonance peak frequency of the total PDN impedance. Therefore, suppressing the anti-resonance peak is currently one of the most important design concerns in VLSI systems. In this paper, the method which is called 'on-board snubber circuits (RC series circuits)' has been studied to suppress the anti-resonance peak. The on-board snubber circuits was added just at the beneath of the power supply terminals of the LSI to effectively suppress the anti-resonance peak of the total PDN impedance. In particular, the design space for damping the anti-resonance peak critically and the added values of capacitance (C snb) and resistance (Rdmp) of the snubber circuits has been examined.

Original languageEnglish
Title of host publicationEDAPS 2013 - 2013 IEEE Electrical Design of Advanced Packaging Systems Symposium
Pages92-95
Number of pages4
DOIs
Publication statusPublished - 2013
Event2013 6th IEEE Electrical Design of Advanced Packaging Systems Symposium, EDAPS 2013 - Nara
Duration: 2013 Dec 122013 Dec 15

Other

Other2013 6th IEEE Electrical Design of Advanced Packaging Systems Symposium, EDAPS 2013
CityNara
Period13/12/1213/12/15

Fingerprint

Damping
Networks (circuits)
Signal interference
Capacitance

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Iijima, Y., Sudo, T., Kinoshita, T., & Uriu, K. (2013). Suppression of anti-resonance peaks by controlling off-chip damping parameters. In EDAPS 2013 - 2013 IEEE Electrical Design of Advanced Packaging Systems Symposium (pp. 92-95). [6724397] https://doi.org/10.1109/EDAPS.2013.6724397

Suppression of anti-resonance peaks by controlling off-chip damping parameters. / Iijima, Yoh; Sudo, Toshio; Kinoshita, Tomohiro; Uriu, Kazuhide.

EDAPS 2013 - 2013 IEEE Electrical Design of Advanced Packaging Systems Symposium. 2013. p. 92-95 6724397.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Iijima, Y, Sudo, T, Kinoshita, T & Uriu, K 2013, Suppression of anti-resonance peaks by controlling off-chip damping parameters. in EDAPS 2013 - 2013 IEEE Electrical Design of Advanced Packaging Systems Symposium., 6724397, pp. 92-95, 2013 6th IEEE Electrical Design of Advanced Packaging Systems Symposium, EDAPS 2013, Nara, 13/12/12. https://doi.org/10.1109/EDAPS.2013.6724397
Iijima Y, Sudo T, Kinoshita T, Uriu K. Suppression of anti-resonance peaks by controlling off-chip damping parameters. In EDAPS 2013 - 2013 IEEE Electrical Design of Advanced Packaging Systems Symposium. 2013. p. 92-95. 6724397 https://doi.org/10.1109/EDAPS.2013.6724397
Iijima, Yoh ; Sudo, Toshio ; Kinoshita, Tomohiro ; Uriu, Kazuhide. / Suppression of anti-resonance peaks by controlling off-chip damping parameters. EDAPS 2013 - 2013 IEEE Electrical Design of Advanced Packaging Systems Symposium. 2013. pp. 92-95
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