Three-dimensional interconnect technology for ultra-compact MMICs

Makoto Hirano, Kenjiro Nishikawa, Ichihiko Toyoda, Shinji Aoyama, Suehiro Sugitani, Kimiyoshi Yamasaki

    Research output: Contribution to journalArticle

    6 Citations (Scopus)

    Abstract

    A novel interconnect technology was reviewed, which was developed for three-dimensional (3-D) ultra-compact MMICs. Using O2/He RIE for the through hole and trench formation of a thick polyimide insulator layer, low-current electroplating for gold sidewall formation in the through-holes and the trenches, and ion-milling with WSiN metal stopper for gold patterning, a complete three-dimensional metal interconnection structure was built. We call this fabrication method as folded metal interconnection technology with thick insulator(FMIT). The 3-D interconnection structure involves vertical interconnection elements such as a wall-like microwire for shielding or coupling, and a pillar-like via-connection with multi-leveled planar interconnections in a 10-μm-thick polyimide matrix on an IC chip. The structure provides many passive functional elements and circuits in an extremely small area. This technology stages the next-generation of ultra-compact MMICs by offering the circuit designers great design flexibility and higher integration of circuits.

    Original languageEnglish
    Pages (from-to)1451-1455
    Number of pages5
    JournalSolid-State Electronics
    Volume41
    Issue number10
    DOIs
    Publication statusPublished - 1997 Oct

    ASJC Scopus subject areas

    • Electronic, Optical and Magnetic Materials
    • Condensed Matter Physics
    • Electrical and Electronic Engineering
    • Materials Chemistry

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    Hirano, M., Nishikawa, K., Toyoda, I., Aoyama, S., Sugitani, S., & Yamasaki, K. (1997). Three-dimensional interconnect technology for ultra-compact MMICs. Solid-State Electronics, 41(10), 1451-1455. https://doi.org/10.1016/S0038-1101(97)00088-9