Time-dependent dielectric breakdown characterization of 90- and 65-nm-Node Cu/SiOC interconnects with via plugs

Kazuyoshi Ueno, Akiko Kameyama, Akira Matsumoto, Manabu Iguchi, Toshiyuki Takewaki, Daisuke Oshida, Hironori Toyoshima, Naoyoshi Kawahara, Susumu Asada, Mieko Suzuki, Noriaki Oda

Research output: Contribution to journalArticle

8 Citations (Scopus)

Abstract

As the wiring-space decreases, the time-dependent dielectric breakdown (TDDB) of Cu/low-dielectric constant (k) interconnects becomes a critical reliability issue and more accurate prediction of the TDDB lifetime will be required. In this investigation, TDDB dependences on temperature and electric field are studied comprehensively for 90- and 65-nm-node Cu/ SiOC interconnects using practical multilevel test structures with via plugs. Low-electric-field TDDB tests down to 1 MV/cm. were carried out by a package TDDB method with high temperature up to 300°C. Linear dependence of the TDDB lifetime on the electric-field is observed down to 1 MV/cm, and this suggests that the lifetime can be predicted using the E-model. The linear dependence of the TDDB lifetime on temperature is also observed up to 300°C at 1.8 MV/cm. The activation energies for the 90 and 65 nm. nodes are almost the same values, 0.76 eV for the 90 nm node and 0.74 eV for the 65 nm node. Failure is observed at the interfaces between the cap dielectric (SiCN) and the silicon dioxide layer with a surface polished by chemical-mechanical polishing (CMP) for both nodes. It is noted that no difference in the failure modes is seen between dense SiOC for the 90 nm node and porous SiOC for the 65 nm node, in spite of the different materials used for the intermetal dielectrics. This suggests that the polished interfaces greatly affect on the TDDB lifetime for both nodes. Improved TDDB lifetime is obtained by increasing the post-CMP cleaning time and the pretreatment time before the cap dielectric deposition. Sufficient TDDB lifetimes of over 10 years under practical operating conditions are obtained for both 90- and 65-nm-node Cu/low-k interconnects with via plugs.

Original languageEnglish
Pages (from-to)1444-1451
Number of pages8
JournalJapanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
Volume46
Issue number4 A
DOIs
Publication statusPublished - 2007 Apr 5

Fingerprint

Electric connectors
plugs
Electric breakdown
breakdown
life (durability)
Chemical mechanical polishing
Electric fields
polishing
caps
electric fields
Electric wiring
Failure modes
wiring
failure modes
Cleaning
Temperature distribution
Permittivity
Activation energy

Keywords

  • Cu
  • Dielectric reliability
  • Interconnection
  • Low-k
  • LSI
  • Time-dependent dielectric breakdown

ASJC Scopus subject areas

  • Physics and Astronomy (miscellaneous)

Cite this

Time-dependent dielectric breakdown characterization of 90- and 65-nm-Node Cu/SiOC interconnects with via plugs. / Ueno, Kazuyoshi; Kameyama, Akiko; Matsumoto, Akira; Iguchi, Manabu; Takewaki, Toshiyuki; Oshida, Daisuke; Toyoshima, Hironori; Kawahara, Naoyoshi; Asada, Susumu; Suzuki, Mieko; Oda, Noriaki.

In: Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers, Vol. 46, No. 4 A, 05.04.2007, p. 1444-1451.

Research output: Contribution to journalArticle

Ueno, K, Kameyama, A, Matsumoto, A, Iguchi, M, Takewaki, T, Oshida, D, Toyoshima, H, Kawahara, N, Asada, S, Suzuki, M & Oda, N 2007, 'Time-dependent dielectric breakdown characterization of 90- and 65-nm-Node Cu/SiOC interconnects with via plugs', Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers, vol. 46, no. 4 A, pp. 1444-1451. https://doi.org/10.1143/JJAP.46.1444
Ueno, Kazuyoshi ; Kameyama, Akiko ; Matsumoto, Akira ; Iguchi, Manabu ; Takewaki, Toshiyuki ; Oshida, Daisuke ; Toyoshima, Hironori ; Kawahara, Naoyoshi ; Asada, Susumu ; Suzuki, Mieko ; Oda, Noriaki. / Time-dependent dielectric breakdown characterization of 90- and 65-nm-Node Cu/SiOC interconnects with via plugs. In: Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers. 2007 ; Vol. 46, No. 4 A. pp. 1444-1451.
@article{7732081c4a1f4fdfbb2846f3df44d495,
title = "Time-dependent dielectric breakdown characterization of 90- and 65-nm-Node Cu/SiOC interconnects with via plugs",
abstract = "As the wiring-space decreases, the time-dependent dielectric breakdown (TDDB) of Cu/low-dielectric constant (k) interconnects becomes a critical reliability issue and more accurate prediction of the TDDB lifetime will be required. In this investigation, TDDB dependences on temperature and electric field are studied comprehensively for 90- and 65-nm-node Cu/ SiOC interconnects using practical multilevel test structures with via plugs. Low-electric-field TDDB tests down to 1 MV/cm. were carried out by a package TDDB method with high temperature up to 300°C. Linear dependence of the TDDB lifetime on the electric-field is observed down to 1 MV/cm, and this suggests that the lifetime can be predicted using the E-model. The linear dependence of the TDDB lifetime on temperature is also observed up to 300°C at 1.8 MV/cm. The activation energies for the 90 and 65 nm. nodes are almost the same values, 0.76 eV for the 90 nm node and 0.74 eV for the 65 nm node. Failure is observed at the interfaces between the cap dielectric (SiCN) and the silicon dioxide layer with a surface polished by chemical-mechanical polishing (CMP) for both nodes. It is noted that no difference in the failure modes is seen between dense SiOC for the 90 nm node and porous SiOC for the 65 nm node, in spite of the different materials used for the intermetal dielectrics. This suggests that the polished interfaces greatly affect on the TDDB lifetime for both nodes. Improved TDDB lifetime is obtained by increasing the post-CMP cleaning time and the pretreatment time before the cap dielectric deposition. Sufficient TDDB lifetimes of over 10 years under practical operating conditions are obtained for both 90- and 65-nm-node Cu/low-k interconnects with via plugs.",
keywords = "Cu, Dielectric reliability, Interconnection, Low-k, LSI, Time-dependent dielectric breakdown",
author = "Kazuyoshi Ueno and Akiko Kameyama and Akira Matsumoto and Manabu Iguchi and Toshiyuki Takewaki and Daisuke Oshida and Hironori Toyoshima and Naoyoshi Kawahara and Susumu Asada and Mieko Suzuki and Noriaki Oda",
year = "2007",
month = "4",
day = "5",
doi = "10.1143/JJAP.46.1444",
language = "English",
volume = "46",
pages = "1444--1451",
journal = "Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes",
issn = "0021-4922",
publisher = "Japan Society of Applied Physics",
number = "4 A",

}

TY - JOUR

T1 - Time-dependent dielectric breakdown characterization of 90- and 65-nm-Node Cu/SiOC interconnects with via plugs

AU - Ueno, Kazuyoshi

AU - Kameyama, Akiko

AU - Matsumoto, Akira

AU - Iguchi, Manabu

AU - Takewaki, Toshiyuki

AU - Oshida, Daisuke

AU - Toyoshima, Hironori

AU - Kawahara, Naoyoshi

AU - Asada, Susumu

AU - Suzuki, Mieko

AU - Oda, Noriaki

PY - 2007/4/5

Y1 - 2007/4/5

N2 - As the wiring-space decreases, the time-dependent dielectric breakdown (TDDB) of Cu/low-dielectric constant (k) interconnects becomes a critical reliability issue and more accurate prediction of the TDDB lifetime will be required. In this investigation, TDDB dependences on temperature and electric field are studied comprehensively for 90- and 65-nm-node Cu/ SiOC interconnects using practical multilevel test structures with via plugs. Low-electric-field TDDB tests down to 1 MV/cm. were carried out by a package TDDB method with high temperature up to 300°C. Linear dependence of the TDDB lifetime on the electric-field is observed down to 1 MV/cm, and this suggests that the lifetime can be predicted using the E-model. The linear dependence of the TDDB lifetime on temperature is also observed up to 300°C at 1.8 MV/cm. The activation energies for the 90 and 65 nm. nodes are almost the same values, 0.76 eV for the 90 nm node and 0.74 eV for the 65 nm node. Failure is observed at the interfaces between the cap dielectric (SiCN) and the silicon dioxide layer with a surface polished by chemical-mechanical polishing (CMP) for both nodes. It is noted that no difference in the failure modes is seen between dense SiOC for the 90 nm node and porous SiOC for the 65 nm node, in spite of the different materials used for the intermetal dielectrics. This suggests that the polished interfaces greatly affect on the TDDB lifetime for both nodes. Improved TDDB lifetime is obtained by increasing the post-CMP cleaning time and the pretreatment time before the cap dielectric deposition. Sufficient TDDB lifetimes of over 10 years under practical operating conditions are obtained for both 90- and 65-nm-node Cu/low-k interconnects with via plugs.

AB - As the wiring-space decreases, the time-dependent dielectric breakdown (TDDB) of Cu/low-dielectric constant (k) interconnects becomes a critical reliability issue and more accurate prediction of the TDDB lifetime will be required. In this investigation, TDDB dependences on temperature and electric field are studied comprehensively for 90- and 65-nm-node Cu/ SiOC interconnects using practical multilevel test structures with via plugs. Low-electric-field TDDB tests down to 1 MV/cm. were carried out by a package TDDB method with high temperature up to 300°C. Linear dependence of the TDDB lifetime on the electric-field is observed down to 1 MV/cm, and this suggests that the lifetime can be predicted using the E-model. The linear dependence of the TDDB lifetime on temperature is also observed up to 300°C at 1.8 MV/cm. The activation energies for the 90 and 65 nm. nodes are almost the same values, 0.76 eV for the 90 nm node and 0.74 eV for the 65 nm node. Failure is observed at the interfaces between the cap dielectric (SiCN) and the silicon dioxide layer with a surface polished by chemical-mechanical polishing (CMP) for both nodes. It is noted that no difference in the failure modes is seen between dense SiOC for the 90 nm node and porous SiOC for the 65 nm node, in spite of the different materials used for the intermetal dielectrics. This suggests that the polished interfaces greatly affect on the TDDB lifetime for both nodes. Improved TDDB lifetime is obtained by increasing the post-CMP cleaning time and the pretreatment time before the cap dielectric deposition. Sufficient TDDB lifetimes of over 10 years under practical operating conditions are obtained for both 90- and 65-nm-node Cu/low-k interconnects with via plugs.

KW - Cu

KW - Dielectric reliability

KW - Interconnection

KW - Low-k

KW - LSI

KW - Time-dependent dielectric breakdown

UR - http://www.scopus.com/inward/record.url?scp=34547865799&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=34547865799&partnerID=8YFLogxK

U2 - 10.1143/JJAP.46.1444

DO - 10.1143/JJAP.46.1444

M3 - Article

AN - SCOPUS:34547865799

VL - 46

SP - 1444

EP - 1451

JO - Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes

JF - Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes

SN - 0021-4922

IS - 4 A

ER -