Two-Dimensional Simulations of Drain-Current Transients in GaAs MESFET’s with Semi-insulating Substrates Compensated by Deep Levels

K.Horio K.Horio, Y.Fuseya Y.Fuseya, Kazushige Horio

Research output: Contribution to journalArticle

40 Citations (Scopus)
Original languageEnglish
Pages (from-to)1340-1346
JournalIEEE Trans. Electron Devices
Volume41
Publication statusPublished - 1994 Aug 1

Cite this

Two-Dimensional Simulations of Drain-Current Transients in GaAs MESFET’s with Semi-insulating Substrates Compensated by Deep Levels. / K.Horio, K.Horio; Y.Fuseya, Y.Fuseya; Horio, Kazushige.

In: IEEE Trans. Electron Devices, Vol. 41, 01.08.1994, p. 1340-1346.

Research output: Contribution to journalArticle

@article{b15c8030e8cc49c680af90450e6019e8,
title = "Two-Dimensional Simulations of Drain-Current Transients in GaAs MESFET’s with Semi-insulating Substrates Compensated by Deep Levels",
author = "K.Horio K.Horio and Y.Fuseya Y.Fuseya and Kazushige Horio",
year = "1994",
month = "8",
day = "1",
language = "English",
volume = "41",
pages = "1340--1346",
journal = "IEEE Trans. Electron Devices",

}

TY - JOUR

T1 - Two-Dimensional Simulations of Drain-Current Transients in GaAs MESFET’s with Semi-insulating Substrates Compensated by Deep Levels

AU - K.Horio, K.Horio

AU - Y.Fuseya, Y.Fuseya

AU - Horio, Kazushige

PY - 1994/8/1

Y1 - 1994/8/1

M3 - Article

VL - 41

SP - 1340

EP - 1346

JO - IEEE Trans. Electron Devices

JF - IEEE Trans. Electron Devices

ER -