Ultra-low-power-consumption heterojunction FET 8:1 MUX/1:8 DEMUX for 2.4-GBPS optical-fiber communication systems

Keiichi Numata; Masahiro Fujii; Tadashi Maeda; Masatoshi Tokushima; Shigeki Wada; Muneo Fukaishi; Masaoki Ishikawa

Ultra-low-power-consumption heterojunction FET 8:1 MUX/1:8 DEMUX for 2.4-GBPS optical-fiber communication systems

Keiichi Numata, Masahiro Fujii, Tadashi Maeda, Masatoshi Tokushima, Shigeki Wada, Muneo Fukaishi, Masaoki Ishikawa

Research output: Contribution to conference › Paper › peer-review

Abstract

A gallium arsenide 8:1 multiplexer (MUX) and a 1:8 demultiplexer (DEMUX) for 2.4 Gbps optical communication systems have been developed. These LSIs employ a tree-type architecture using 2:1 MUXs/1:2 DEMUXs that is suitable for high-speed and low power operation but requires precise control of clock timing. To ensure timing margins, a new timing generator and clock buffer circuit have been developed. These LSIs operate at over 2.4 Gbps with 150-mW of power consumption at a supply voltage of 0.7 V.

Original language	English
Pages	39-42
Number of pages	4
Publication status	Published - 1995 Dec 1
Externally published	Yes
Event	Proceedings of the 17th Annual IEEE Gallium Arsenide Integrated Circuit Symposium - San Diego, CA, USA Duration: 1995 Oct 29 → 1995 Nov 1

Other

Other	Proceedings of the 17th Annual IEEE Gallium Arsenide Integrated Circuit Symposium
City	San Diego, CA, USA
Period	95/10/29 → 95/11/1

ASJC Scopus subject areas

Electrical and Electronic Engineering

Cite this

Ultra-low-power-consumption heterojunction FET 8:1 MUX/1:8 DEMUX for 2.4-GBPS optical-fiber communication systems. / Numata, Keiichi; Fujii, Masahiro; Maeda, Tadashi et al.

1995. 39-42 Paper presented at Proceedings of the 17th Annual IEEE Gallium Arsenide Integrated Circuit Symposium, San Diego, CA, USA.

Research output: Contribution to conference › Paper › peer-review

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abstract = "A gallium arsenide 8:1 multiplexer (MUX) and a 1:8 demultiplexer (DEMUX) for 2.4 Gbps optical communication systems have been developed. These LSIs employ a tree-type architecture using 2:1 MUXs/1:2 DEMUXs that is suitable for high-speed and low power operation but requires precise control of clock timing. To ensure timing margins, a new timing generator and clock buffer circuit have been developed. These LSIs operate at over 2.4 Gbps with 150-mW of power consumption at a supply voltage of 0.7 V.",

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year = "1995",

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AU - Maeda, Tadashi

AU - Tokushima, Masatoshi

AU - Wada, Shigeki

AU - Fukaishi, Muneo

AU - Ishikawa, Masaoki

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N2 - A gallium arsenide 8:1 multiplexer (MUX) and a 1:8 demultiplexer (DEMUX) for 2.4 Gbps optical communication systems have been developed. These LSIs employ a tree-type architecture using 2:1 MUXs/1:2 DEMUXs that is suitable for high-speed and low power operation but requires precise control of clock timing. To ensure timing margins, a new timing generator and clock buffer circuit have been developed. These LSIs operate at over 2.4 Gbps with 150-mW of power consumption at a supply voltage of 0.7 V.

AB - A gallium arsenide 8:1 multiplexer (MUX) and a 1:8 demultiplexer (DEMUX) for 2.4 Gbps optical communication systems have been developed. These LSIs employ a tree-type architecture using 2:1 MUXs/1:2 DEMUXs that is suitable for high-speed and low power operation but requires precise control of clock timing. To ensure timing margins, a new timing generator and clock buffer circuit have been developed. These LSIs operate at over 2.4 Gbps with 150-mW of power consumption at a supply voltage of 0.7 V.

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Ultra-low-power-consumption heterojunction FET 8:1 MUX/1:8 DEMUX for 2.4-GBPS optical-fiber communication systems

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