Abstract
This paper describes a GaAs divide-by-256/258 dual-modulus static prescaler IC. The prescaler has a pulse swallow counter-type architecture and quasi-differential switch flip-flop (QD-FF) as its basic circuit architecture. For the input buffer circuit, we have developed a circuit that we call a source coupled push-pull circuit (SCC), which can generate high-frequency complementary signals from a single phase signal at a low supply voltage. The IC operates at up to 14.5 GHz with a power consumption of 22 mW. The power consumption is 1/100 that of a previously reported prescaler.
| Original language | English |
|---|---|
| Title of host publication | Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit) |
| Publisher | IEEE |
| Publication status | Published - 1997 |
| Externally published | Yes |
| Event | Proceedings of the 1997 19th Annual IEEE Gallium Arsenide Integrated Circuit Symposium - Anaheim, CA, USA Duration: 1997 Oct 12 → 1997 Oct 15 |
Other
| Other | Proceedings of the 1997 19th Annual IEEE Gallium Arsenide Integrated Circuit Symposium |
|---|---|
| City | Anaheim, CA, USA |
| Period | 97/10/12 → 97/10/15 |
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ASJC Scopus subject areas
- Electrical and Electronic Engineering
Cite this
Ultra-low-power-consumption high-speed GaAs 256/258 dual-modulus prescaler IC. / Maeda, Tadashi; Wada, Sh; Tokushima, M.; Ishikawa, M.; Yamazaki, J.; Fujii, M.
Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit). IEEE, 1997.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - Ultra-low-power-consumption high-speed GaAs 256/258 dual-modulus prescaler IC
AU - Maeda, Tadashi
AU - Wada, Sh
AU - Tokushima, M.
AU - Ishikawa, M.
AU - Yamazaki, J.
AU - Fujii, M.
PY - 1997
Y1 - 1997
N2 - This paper describes a GaAs divide-by-256/258 dual-modulus static prescaler IC. The prescaler has a pulse swallow counter-type architecture and quasi-differential switch flip-flop (QD-FF) as its basic circuit architecture. For the input buffer circuit, we have developed a circuit that we call a source coupled push-pull circuit (SCC), which can generate high-frequency complementary signals from a single phase signal at a low supply voltage. The IC operates at up to 14.5 GHz with a power consumption of 22 mW. The power consumption is 1/100 that of a previously reported prescaler.
AB - This paper describes a GaAs divide-by-256/258 dual-modulus static prescaler IC. The prescaler has a pulse swallow counter-type architecture and quasi-differential switch flip-flop (QD-FF) as its basic circuit architecture. For the input buffer circuit, we have developed a circuit that we call a source coupled push-pull circuit (SCC), which can generate high-frequency complementary signals from a single phase signal at a low supply voltage. The IC operates at up to 14.5 GHz with a power consumption of 22 mW. The power consumption is 1/100 that of a previously reported prescaler.
UR - http://www.scopus.com/inward/record.url?scp=0031345313&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=0031345313&partnerID=8YFLogxK
M3 - Conference contribution
BT - Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)
PB - IEEE
ER -