年別の研究成果
年別の研究成果
検索結果
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SLD-1(Silent Large Datapath): A ultra low power reconfigurable accelerator
Ozaki, N., Usami, K., Amano, H., Namiki, M., Nakamura, H. & Kondo, M., 2011, IEEE Symposium on Low-Power and High-Speed Chips - 2011 IEEE COOL Chips XIV, Proceedings. 5890918. (IEEE Symposium on Low-Power and High-Speed Chips - 2011 IEEE COOL Chips XIV, Proceedings).研究成果: Conference contribution
2 被引用数 (Scopus) -
Stepwise sleep depth control for run-time leakage power saving
Takeda, S., Miwa, S., Usami, K. & Nakamura, H., 2012 5月 22, GLSVLSI'12 - Proceedings of the Great Lakes Symposium on VLSI 2012. p. 233-238 6 p. (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI).研究成果: Conference contribution
2 被引用数 (Scopus) -
Trade-off analysis of fine-grained power gating methods for functional units in a CPU
Wang, W., Ohta, Y., Ishii, Y., Usami, K. & Amano, H., 2012 7月 25, Symposium on Low-Power and High-Speed Chips - Proceedings for 2012 IEEE COOL Chips XV. 6216587. (Symposium on Low-Power and High-Speed Chips - Proceedings for 2012 IEEE COOL Chips XV).研究成果: Conference contribution
6 被引用数 (Scopus) -
Ultra fine-grained run-time power gating of on-chip routers for CMPs
Matsutani, H., Koibuchi, M., Ikebuchi, D., Usami, K., Nakamura, H. & Amano, H., 2010, NOCS 2010 - The 4th ACM/IEEE International Symposium on Networks-on-Chip. p. 61-68 8 p. 5507560. (NOCS 2010 - The 4th ACM/IEEE International Symposium on Networks-on-Chip).研究成果: Conference contribution
55 被引用数 (Scopus) -
Ultralow-voltage design and technology of silicon-on-thin-buried-oxide (SOTB) CMOS for highly energy efficient electronics in IoT era
Kamohara, S., Sugii, N., Yamamoto, Y., Makiyama, H., Yamashita, T., Hasegawa, T., Okanishi, S., Yanagita, H., Kadoshima, M., Maekawa, K., Mitani, H., Yamagata, Y., Oda, H., Yamaguchi, Y., Ishibashi, K., Amano, H., Usami, K., Kobayashi, K., Mizutani, T. & Hiramoto, T., 2014 9月 8, Digest of Technical Papers - Symposium on VLSI Technology. Institute of Electrical and Electronics Engineers Inc., 6894413. (Digest of Technical Papers - Symposium on VLSI Technology).研究成果: Conference contribution
9 被引用数 (Scopus) -
Unbalanced buffer tree synthesis to suppress ground bounce for fine-grain power gating
Usami, K., Miyauchi, M., Kudo, M., Takagi, K., Amano, H., Namiki, M., Kondo, M. & Nakamura, H., 2014 12月 2, 2014 International Symposium on System-on-Chip, SoC 2014. Nurmi, J., Ellervee, P., Milojevic, D., Daniel, O. & Paakki, T. (eds.). Institute of Electrical and Electronics Engineers Inc., 6972438. (2014 International Symposium on System-on-Chip, SoC 2014).研究成果: Conference contribution
1 被引用数 (Scopus)