• 275 引用
  • 7 h指数
19982019

年単位の研究成果

Pureに変更を加えた場合、すぐここに表示されます。

研究成果

2019

High Efficiency Frequency Shift Keying Data Transmission System using Magnetic Resonance Wireless Power Transfer

Ishii, M., Nakanishi, K. & Sasaki, M., 2019 2 11, 2018 IEEE Wireless Power Transfer Conference, WPTC 2018. Institute of Electrical and Electronics Engineers Inc., 8639341. (2018 IEEE Wireless Power Transfer Conference, WPTC 2018).

研究成果: Conference contribution

2 引用 (Scopus)

Multiple FSK Data and Power Transmission System using Magnetic Resonance Wireless Power Transfer

Ishii, M., Yamanaka, K. & Sasaki, M., 2019 6, 2019 IEEE Wireless Power Transfer Conference, WPTC 2019. Institute of Electrical and Electronics Engineers Inc., p. 208-211 4 p. 9055549. (2019 IEEE Wireless Power Transfer Conference, WPTC 2019).

研究成果: Conference contribution

2017

Data transmission system using magnetic resonance wireless power transfer

Nakanishi, K. & Sasaki, M., 2017 6 19, WPTC 2017 - Wireless Power Transfer Conference. Institute of Electrical and Electronics Engineers Inc., 7953808

研究成果: Conference contribution

6 引用 (Scopus)
2012

A CMOS fully integrated antenna array transmitter with on-chip skew and pulse-delay adjustment for millimeter-wave active imaging

Khanh, N. N. M., Sasaki, M. & Asada, K., 2012 3 27, 2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2012 - Digest of Papers. p. 163-166 4 p. 6160123. (2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2012 - Digest of Papers).

研究成果: Conference contribution

1 引用 (Scopus)

A design-for-test apparatus for measuring on-chip temperature with fine granularity

Tandon, J. S., Sasaki, M., Ikeda, M. & Asada, K., 2012 7 16, Proceedings of the 13th International Symposium on Quality Electronic Design, ISQED 2012. p. 27-32 6 p. 6187470. (Proceedings - International Symposium on Quality Electronic Design, ISQED).

研究成果: Conference contribution

2 引用 (Scopus)
2011
1 引用 (Scopus)
2 引用 (Scopus)
2 引用 (Scopus)

A fully integrated shock wave transmitter with an on-chip dipole antenna for pulse beam-formability in 0.18-μm CMOS

Mai Khanh, N. N., Sasaki, M. & Asada, K., 2011 3 28, 2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011. p. 107-108 2 p. 5722161. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

研究成果: Conference contribution

4 引用 (Scopus)
4 引用 (Scopus)

A millimeter-wave resistor-less pulse generator with a new dipole-patch antenna in 65-nm CMOS

Mai Khanh, N. N., Sasaki, M. & Asada, K., 2011 9 13, 2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011. p. 426-429 4 p. 5981261. (2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011).

研究成果: Conference contribution

4 引用 (Scopus)

Preface of the 2011 IAENG International Conference on Electrical Engineering Special Session: Design, analysis and tools for integrated circuits and systems

Man, K. L., Mercaldi, M., Ma, J., Hahanov, V., Prinetto, P., Poncino, M., Macii, A., Choi, J., Li, W., Schellekens, M., Popovici, E., Dong, J. S., Al-Khalili, D., Navabi, Z., Zinchenko, L., Anjum, M. A., Narasimha, D. L., Hughes, D., Wang, J., Sathish Kumar, A. P. および31人, Jaisankar, N., Mansoor, A., Hollands, S., Mohammadi, S., Klein, F., Lim, E., Lee, K., Mahanti, P., Wan, K., Tillo, T., Wu, Y., Huang, W. C., Sasaki, M., Sahula, V., Boolchandani, D., Wang, Z., Shandilya, S. K., Voeten, J. P. M., Lei, C. U., English, T., Planas, M. M., Chung, C., Harte, S., Yin, A., Giancardi, L., Mady, A. E. D., Khandekar, P. D., Pandey, H. M., Bharti, V., Wang, Y. & Lu, C., 2011 7 26, : : IMECS 2011 - International MultiConference of Engineers and Computer Scientists 2011. 2, p. 1028-1030 3 p.

研究成果: Editorial

A 0.18-μm CMOS shock wave generator with an on-chip antenna and a digitally programmable delay circuit

Mai Khanh, N. N., Sasaki, M., Asada, K. & Monma, T., 2010 9 17, Proceedings of the 2nd Asia Symposium on Quality Electronic Design, ASQED 2010. p. 1-4 4 p. 5548166. (Proceedings of the 2nd Asia Symposium on Quality Electronic Design, ASQED 2010).

研究成果: Conference contribution

1 引用 (Scopus)

A 0.25-μm Si-Ge millimeter-wave damping pulse transmitter chip with on-chip loop antenna array

Mai Khanh, N. N., Sasaki, M. & Asada, K., 2010 11 30, IRMMW-THz 2010 - 35th International Conference on Infrared, Millimeter, and Terahertz Waves, Conference Guide. 5612432. (IRMMW-THz 2010 - 35th International Conference on Infrared, Millimeter, and Terahertz Waves, Conference Guide).

研究成果: Conference contribution

1 引用 (Scopus)
1 引用 (Scopus)

A circuit for on-chip skew adjustment with jitter and setup time measurement

Sasaki, M., Khanh, N. N. M. & Asada, K., 2010 12 1, 2010 IEEE Asian Solid-State Circuits Conference, A-SSCC 2010. p. 217-220 4 p. 5716594. (2010 IEEE Asian Solid-State Circuits Conference, A-SSCC 2010).

研究成果: Conference contribution

8 引用 (Scopus)

A CMOS pulse beamforming transmitter design with an on-chip antenna array for millimeter wave imaging applications

Khanh, N. N. M., Sasaki, M. & Asada, K., 2010 7 14, 2010 5th International Conference on Future Information Technology, FutureTech 2010 - Proceedings. 5482685. (2010 5th International Conference on Future Information Technology, FutureTech 2010 - Proceedings).

研究成果: Conference contribution

2 引用 (Scopus)

Integrated wideband dipole antenna for pulse beam-formability by using 0.18-μm CMOS technology

Khanh, N. N. M., Saski, M. & Asada, K., 2010 12 1, 2010 Asia-Pacific Microwave Conference Proceedings, APMC 2010. p. 1561-1564 4 p. 5728182. (Asia-Pacific Microwave Conference Proceedings, APMC).

研究成果: Conference contribution

2009

An SoC platform with on-chip web interface for in-field monitoring

Iizuka, T., Nakamura, D., Yoshida, H., Komatsu, S., Sasaki, M., Ikeda, M. & Asada, K., 2009 12 1, 2009 International SoC Design Conference, ISOCC 2009. p. 208-211 4 p. 5423911. (2009 International SoC Design Conference, ISOCC 2009).

研究成果: Conference contribution

1 引用 (Scopus)
65 引用 (Scopus)
2007

3.5-Gb/s extended frequency range wave-pipeline PRBS Generator in 0.18-μm CMOS

Sasaki, M., Ikeda, M. & Asada, K., 2007 12 1, : : Default journal. p. 526-529

研究成果: Article

3.5-Gb/s extended frequency range wave-pipeline PRBS Generator in 0.18-μm CMOS

Sasaki, M., Ikeda, M. & Asada, K., 2007 12 1, ICECS 2007 - 14th IEEE International Conference on Electronics, Circuits and Systems. p. 526-529 4 p. 4511044. (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems).

研究成果: Conference contribution

40 frames/sec 16×16 temperature probe array using 90nm 1V CMOS for on-line thermal monitoring on VLSI chip

Sasaki, M., Inoue, T., Ikeda, M. & Asada, K., 2007 12 1, 2007 IEEE Asian Solid-State Circuits Conference, A-SSCC. p. 264-267 4 p. 4425781. (2007 IEEE Asian Solid-State Circuits Conference, A-SSCC).

研究成果: Conference contribution

-1/+0.8°C error, accurate temperature sensor using 90nm IV CMOS for on-line thermal monitoring of VLSI circuits

Sasaki, M., Ikeda, M. & Asada, K., 2006 10 13, 2006 International Conference on Microelectronic Test Structures - Digest of Technical Papers. p. 9-12 4 p. 1614264. (IEEE International Conference on Microelectronic Test Structures; 巻数 2006).

研究成果: Conference contribution

5 引用 (Scopus)

4-Gb/s low-power PRBS Generator with wave-pipeline technique in 0.18-μm CMOS

Sasaki, M., Ikeda, M. & Asada, K., 2006 12 1, : : Default journal. p. 1007-1010

研究成果: Article

2 引用 (Scopus)

4-Gb/s low-power PRBS Generator with wave-pipeline technique in 0.18-μm CMOS

Sasaki, M., Ikeda, M. & Asada, K., 2006 12 1, ICECS 2006 - 13th IEEE International Conference on Electronics, Circuits and Systems. p. 1007-1010 4 p. 4263539. (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems).

研究成果: Conference contribution

2 引用 (Scopus)

A Markov chain Monte Carlo algorithm for bayesian dynamic signature verification

Muramatsu, D., Kondo, M., Sasaki, M., Tachibana, S. & Matsumoto, T., 2006 3 1, : : IEEE Transactions on Information Forensics and Security. 1, 1, p. 22-34 13 p.

研究成果: Article

35 引用 (Scopus)
2005

Novel single-stage second-order structure for low-pass wide-band low-power continuous-time filters

Hadidi, K., Eguchi, K., Ito, M., Sasaki, M., Oshima, H. & Khoei, A., 2005 9 15, : : AEU - International Journal of Electronics and Communications. 59, 6, p. 362-369 8 p.

研究成果: Article

2004

0.18μm CMOS 2GHz Error-Correcting Encoder

Sasaki, M., Nozawa, M. & Matsumoto, T., 2004 4 1, : : Default journal.

研究成果: Article

A wired CDMA interface system

Sasaki, M., Ono, Y. & Matsumoto, T., 2004 7 1, : : WSEAS Transactions on Circuits and Systems. 5, p. 1215-1220

研究成果: Article

Transmembrane Region Prediction with Hydropathy Index/Charge Two-Dimensional Trajectories of Stochastic Dynamical Systems

Kaburagi, T., Muramatsu, D., Hashimoto, S., Sasaki, M. & Matsumoto, T., 2004 1 1, : : Default journal.

研究成果: Article

2003

2.5V CMOS Fully Differential Low Power High Linearity Analog Line-Driver

Hadidi, K., Hadidi?, K. & Sasaki, M., 2003 4 1, : : Default journal. p. 67-72

研究成果: Article

A Bayesian MCMC On-Line Algorithm for Signature Verification

Kondo, M., Muramatsu, D., Sasaki, M. & Matsumoto, T., 2003 7 1, : : Default journal.

研究成果: Article

A highly linear fully differential low power CMOS line driver

Hadidi, K., Oshima, H., Sasaki, M. & Matsumoto, T., 2003 12 1, : : European Solid-State Circuits Conference. p. 541-544 4 p., 1257192.

研究成果: Conference article

2 引用 (Scopus)
6 引用 (Scopus)

Bayesian MCMC for biometric person authentication incorporating on-line signature trajectories

Kondo, M., Muramatsu, D., Sasaki, M. & Matsumoto, T., 2003 12 1, Proceedings of the IASTED International Conference on Signal Processing, Pattern Recognition, and Applications. Hamza, M. H. (版). p. 269-273 5 p. (Proceedings of the IASTED International Conference on Signal Processing, Pattern Reconition, and Applications).

研究成果: Conference contribution

Inferring transmembrane region counts with hydropathy index/charge two dimensional trajectories of stochastic dynamical systems

Muramatsu, D., Hashimoto, S., Tsunashima, T., Kaburagi, T., Sasaki, M. & Matsumoto, T., 2003 1 1, 2003 IEEE 13th Workshop on Neural Networks for Signal Processing, NNSP 2003. Institute of Electrical and Electronics Engineers Inc., p. 101-110 10 p. 1318008. (Neural Networks for Signal Processing - Proceedings of the IEEE Workshop; 巻数 2003-January).

研究成果: Conference contribution

1 引用 (Scopus)

Linearity performance comparison of cascode current source and single-device current source IDPs; analyses, simulations and measurements

Hadidi, K., Morimoto, M., Futami, K., Oue, T., Ito, M., Sasaki, M., Khoei, A. & Matsumoto, T., 2003 5 1, : : International Journal of Electronics. 90, 5, p. 341-353 13 p.

研究成果: Article

1 引用 (Scopus)
2002

A Constant Bandwidth CMOS VGA ckt.

Hadidi, K., Hadidi?, K. & Sasaki, M., 2002 4 1, : : Default journal. p. 363-367

研究成果: Article