前多 正

研究成果

年別の研究成果 1983 1995 1996 1997 1998 1999 2011 2019

• 754 被引用数
• 14 h-index
• 29 Article
• 17 Conference contribution
• 11 Paper
• 4 Conference article
• 4 その他
  • 3 Chapter
  • 1 Editorial

年別の研究成果

年別の研究成果

検索結果

• 1995

  High-speed low-power tri-state driver flip-flop for sub-1 V supply voltage GaAs heterojunction FET LSIs

  Maeda, T., Numata, K., Tokushima, M., Ishikawa, M., Fukaishi, M., Hida, H. & Ohno, Y., 1995 1月 1, NEC Research and Development. 1 ed. Vol. 36. p. 157-164 8 p.

  研究成果: Chapter

  • Heterojunctions 100%
  • Flip flop circuits 89%
  • Field effect transistors 81%
  • Electric potential 39%
  • Electric power utilization 22%

• Sub-1 V supply voltage GaAs LSI technology based on 0.25 μm E/D-HJFETs (IS³Ts)

  Hida, H., Tokushima, M., Maeda, T., Ishikawa, M., Fukaishi, M., Numata, K. & Ohno, Y., 1995 1月 1, NEC Research and Development. 1 ed. Vol. 36. p. 147-156 10 p.

  研究成果: Chapter

  • Field effect transistors 100%
  • Electric potential 48%
  • Current voltage characteristics 30%
  • Heterojunctions 30%
  • Photolithography 29%
• 1992

  Low power consumption 16:1 MUX/DMUX for the STM-16 transmission systems based on DMT DCFL circuits

  Fujii, M., Tokushima, M., Ishikawa, M., Fukaishi, M., Maeda, T., Hida, H., Ohno, Y. & Takano, I., 1992 7月 1, NEC Research and Development. 3 ed. Vol. 33. p. 313-323 11 p.

  研究成果: Chapter

  • Electric power utilization 100%
  • Networks (circuits) 74%
  • Emitter coupled logic circuits 37%
  • Logic gates 32%
  • Logic circuits 30%
  1 被引用数 (Scopus)