@article{c409b0cba50243fd97ff1c2926cdaa4c,
title = "120-Gb/s multiplexing and 110-Gb/s demultiplexing ICs",
abstract = "InP HBT ICs capable of 120-Gb/s multiplexing and 110-Gb/s demultiplexing operation have been developed. They feature a direct-drive series-gating configuration selector, an asymmetrical latch flip-flop, and broadband impedance matching with inverted microstrip lines. Their input sensitivity is less than 100 mVpp, and the output swing is more than 400 mV pp. To the best of our knowledge, this result is the highest data rate operation reported for electronic ICs. Moreover, error-free multiplexing and demultiplexing operation at 100 Gb/s was demonstrated.",
keywords = "Demultiplexing, Error-free operation, Flip-flop, Impedance matching, InP HBT, Multiplexing, Optical transmission system, Selector",
author = "Yasuyuki Suzuki and Zin Yamazaki and Yasushi Amamiya and Shigeki Wada and Hiroaki Uchida and Chiharu Kurioka and Shinichi Tanaka and Hikaru Hida",
note = "Funding Information: Manuscript received April 16, 2004; revised July 14, 2004. This work was supported in part by the National Institute of Information and Communications Technology of Japan. Y. Suzuki, Z. Yamazaki, Y. Amamiya, S. Wada, S. Tanaka, and H. Hida are with the System Devices Research Laboratories, NEC Corporation, Ibaraki 305-8501, Japan (e-mail: y-suzuki@ed.jp.nec.com). H. Uchida and C. Kurioka are with NEC Engineering, Ltd., Kanagawa 211-8666, Japan. Digital Object Identifier 10.1109/JSSC.2004.835647",
year = "2004",
month = dec,
doi = "10.1109/JSSC.2004.835647",
language = "English",
volume = "39",
pages = "2397--2402",
journal = "IEEE Journal of Solid-State Circuits",
issn = "0018-9200",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "12",
}