A 0.18-μm CMOS shock wave generator with an on-chip antenna and a digitally programmable delay circuit

Nguyen Ngoc Mai Khanh, Masahiro Sasaki, Kunihiro Asada, Taihei Monma

研究成果: Conference contribution

1 引用 (Scopus)

抜粋

A 9-11-GHz fully integrated shock wave generator using a 0.18-μm CMOS process for in-door active imaging applications is presented. This chip includes an on-chip wideband meandering dipole antenna, a shock wave generator and a 5-bit digitally programmable delay circuit. The pulse generator simulation produces a 0.4-V peak-peak (p-p) pulse amplitude with a 45.86-ps monopulse cycle in simulation. The integrated dipole antenna's bandwidth -10 dB is 25.3 GHz in EMDS, ADS 2008 simulation. A 20-dB standard horn antenna with distance of 38 mm to this chip is used for the measurement. Measurement results show that 9-11-GHz pulse frequency response with 1.1-mVp-p pulse output voltage received from the horn antenna and 3-ps delay control resolution are suitable for fully on-chip pulse beam forming purpose with integrated antenna array.

元の言語English
ホスト出版物のタイトルProceedings of the 2nd Asia Symposium on Quality Electronic Design, ASQED 2010
ページ1-4
ページ数4
DOI
出版物ステータスPublished - 2010 9 17
イベント2nd Asia Symposium on Quality Electronic Design, ASQED 2010 - Penang, Malaysia
継続期間: 2010 8 32010 8 4

出版物シリーズ

名前Proceedings of the 2nd Asia Symposium on Quality Electronic Design, ASQED 2010

Conference

Conference2nd Asia Symposium on Quality Electronic Design, ASQED 2010
Malaysia
Penang
期間10/8/310/8/4

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

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  • これを引用

    Mai Khanh, N. N., Sasaki, M., Asada, K., & Monma, T. (2010). A 0.18-μm CMOS shock wave generator with an on-chip antenna and a digitally programmable delay circuit. : Proceedings of the 2nd Asia Symposium on Quality Electronic Design, ASQED 2010 (pp. 1-4). [5548166] (Proceedings of the 2nd Asia Symposium on Quality Electronic Design, ASQED 2010). https://doi.org/10.1109/ASQED.2010.5548166