A 0.7-μm-pitch double level aluminum (Al) interconnection technology on a 1-μm-high step is established for 1-Gbit dynamic random access memories (DRAMs). A SiO2 film which has a high resistance to Al etching was used as the mask layer. 0.35-μm-width Al wirings were fabricated even on a 1-μm-high step. 0.2-μm-spaces (aspect ratio=2.5) between the taper shaped Al lines were filled, for the first time, by a plasma enhanced chemical vapor deposition (PECVD) fluorine doped silicon oxide (SiOF) film (ε=3.9). The SiOF film capped with the PECVD SiO2 film has enough stability for the process integration. It was confirmed that these technologies can be applied to a double level Al interconnection using a 0.3-μm-diameter tungsten (W) plug.
|ジャーナル||Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers|
|号||3 SUPPL. B|
|出版ステータス||Published - 1998 3月|
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