An 8:1 multiplexer (MUX) and a 1:8 demultiplexer (DEMUX) for 2.4-Gb/s optical communication systems have been developed using 0.35-μm GaAs heterojunction field-effect transistors (FET's). To ensure timing margins, a new timing generator with latches and new clock buffers with cross-coupled inverters have been developed. These large-scale integrations (LSI's) operate at over 2.4 Gb/s with a power consumption of 150 mW (MUX) and 170 mW (DEMUX) at a supply voltage of 0.7 V, and at over 5 Gb/s with power consumption of 200 mW at a supply voltage of 0.8 V.
|ジャーナル||IEEE Transactions on Very Large Scale Integration (VLSI) Systems|
|出版物ステータス||Published - 1998 12 1|
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering