抄録
This paper describes a new 7-mask CMOS process using liquid phase oxide deposition which has selectivity against photoresist. The process modules for self-aligned well and one mask LDD formation are developed. The features of the process are 1) short TAT: 7 masks to first metallization, 2) self-aligned twin retrograde wells with 40% reduction of the p+-n+ spacing compared to conventional wells, and 3) optimal LDD design using different sidewall spacer width for n- and p-channel MOSFET’s giving a 10% larger on-current for p-channel MOSFET’s compared to a conventional process.
本文言語 | English |
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ページ(範囲) | 1455-1460 |
ページ数 | 6 |
ジャーナル | IEEE Transactions on Electron Devices |
巻 | 40 |
号 | 8 |
DOI | |
出版ステータス | Published - 1993 8月 |
外部発表 | はい |
ASJC Scopus subject areas
- 電子材料、光学材料、および磁性材料
- 電子工学および電気工学