A 7-Mask CMOS Process with Selective Oxide Deposition

Tadahiko Horiuchi, Tetsuya Homma, Yukinobu Murao, Koichiro Okumura

研究成果: Article

12 被引用数 (Scopus)

抄録

This paper describes a new 7-mask CMOS process using liquid phase oxide deposition which has selectivity against photoresist. The process modules for self-aligned well and one mask LDD formation are developed. The features of the process are 1) short TAT: 7 masks to first metallization, 2) self-aligned twin retrograde wells with 40% reduction of the p+-n+ spacing compared to conventional wells, and 3) optimal LDD design using different sidewall spacer width for n- and p-channel MOSFET’s giving a 10% larger on-current for p-channel MOSFET’s compared to a conventional process.

本文言語English
ページ(範囲)1455-1460
ページ数6
ジャーナルIEEE Transactions on Electron Devices
40
8
DOI
出版ステータスPublished - 1993 8
外部発表はい

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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