A coarse grained-reconfigurable accelerator with energy efficient MTJ-based non-volatile flip-flops

Takeharu Ikezoe, Hideharu Amano, Junya Akaike, Kimiyoshi Usami, Masaru Kudo, Keizo Hiraga, Yusuke Shuto, Kojiro Yagami

研究成果: Conference contribution

抜粋

Recent IoT devices are required to be an extremely low power in idle time, while a certain performance is required in active time. NVCMA (Non-volatile Cool Mega Array) is a coarse-grain reconfigurable accelerator (CGRA) providing memory elements with spin transfer torque type non-volatile memory technology to keep data when the power gating is applied. Here, in order to reduce the energy for storing data into non-volatile Flip Flops (NVFF)s, a verification mechanism is introduced. The data are written with a storing time much shorter than usual. If the verification result is not correct, the next trial is done until all results are verified. This approach can omit unnecessary energy for using long writing time with margin considering variation and temperature. For NVCMA, we propose a power manager which controls store, restore, verification, sleep-down and wake-up by extending micro-instructions of the original CMA. Sophisticated power management both for storing data into NVFFs and power gating is integrated into the application program, and the content of data memory can be stored in NVFFs as required as well as configuration data and micro-instructions. Total NVFFs are divided into 10 independent domains which can be controlled independently. Power management instructions are designed so as to reduce the number of instructions as possible by using the bit-map registers and compound instructions. By using the short store with verification, the energy for storing data was reduced by 30% in average. The ever-on leakage power is just about 4% of the total leakage which can be saved by the power gating. Compared with the hard-wired implementation, the proposed power manager increases the area by 17.7%, yet the total area overhead is only 4%.

元の言語English
ホスト出版物のタイトル2018 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2018
編集者David Andrews, Claudia Feregrino, Rene Cumplido, Dirk Stroobandt
出版者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子版)9781728119687
DOI
出版物ステータスPublished - 2019 2 13
イベント2018 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2018 - Cancun, Mexico
継続期間: 2018 12 32018 12 5

出版物シリーズ

氏名2018 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2018

Conference

Conference2018 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2018
Mexico
Cancun
期間18/12/318/12/5

    フィンガープリント

ASJC Scopus subject areas

  • Hardware and Architecture
  • Software

これを引用

Ikezoe, T., Amano, H., Akaike, J., Usami, K., Kudo, M., Hiraga, K., ... Yagami, K. (2019). A coarse grained-reconfigurable accelerator with energy efficient MTJ-based non-volatile flip-flops. : D. Andrews, C. Feregrino, R. Cumplido, & D. Stroobandt (版), 2018 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2018 [8641712] (2018 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/RECONFIG.2018.8641712