A design-for-test apparatus for measuring on-chip temperature with fine granularity

James S. Tandon, Masahiro Sasaki, Makoto Ikeda, Kunihiro Asada

研究成果: Conference contribution

抄録

We present a design-for-test apparatus for measuring real-time, on-chip heat map images with high granularity. Our test chip implemented an 8 x 8 matrix of temperature sensors on-chip in a 0.18μm process with minimal area and power consumption overhead. We then implemented a test interface for measuring individual temperatures with an off-chip ADC and a custom FPGA-based microcontroller with serial UART and ethernet capabilities. This apparatus was used to animate the variation in temperature across the die over time. While temperature sensors have been integrated extensively in VLSI circuits, a single sensor cannot take accurate measurements across an entire chip. Infrared cameras are excellent for direct measurement of temperature across a die, however with new, so-called 3D integrated circuit technology, an infrared camera cannot measure the temperature inside a three dimensional stack. Since performance, reliability, and power consumption are all related to temperature, operating constraints for temperature must be verified to ensure proper device operation. Our design-for-test apparatus demonstrates that fine-grain, real-time measurements of temperature on-chip can be accomplished in real-time with less than 0.5% area overhead in a 1.5 × 1.5mm 2 total core area, and less than 1mW power consumption added to the device under test (DUT).

元の言語English
ホスト出版物のタイトルProceedings - International Symposium on Quality Electronic Design, ISQED
ページ27-32
ページ数6
DOI
出版物ステータスPublished - 2012
外部発表Yes
イベント13th International Symposium on Quality Electronic Design, ISQED 2012 - Santa Clara, CA
継続期間: 2012 3 192012 3 21

Other

Other13th International Symposium on Quality Electronic Design, ISQED 2012
Santa Clara, CA
期間12/3/1912/3/21

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Electric power utilization
Temperature
Temperature sensors
Cameras
Infrared radiation
VLSI circuits
Microcontrollers
Ethernet
Time measurement
Field programmable gate arrays (FPGA)
Sensors
Hot Temperature
Three dimensional integrated circuits

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

これを引用

Tandon, J. S., Sasaki, M., Ikeda, M., & Asada, K. (2012). A design-for-test apparatus for measuring on-chip temperature with fine granularity. : Proceedings - International Symposium on Quality Electronic Design, ISQED (pp. 27-32). [6187470] https://doi.org/10.1109/ISQED.2012.6187470

A design-for-test apparatus for measuring on-chip temperature with fine granularity. / Tandon, James S.; Sasaki, Masahiro; Ikeda, Makoto; Asada, Kunihiro.

Proceedings - International Symposium on Quality Electronic Design, ISQED. 2012. p. 27-32 6187470.

研究成果: Conference contribution

Tandon, JS, Sasaki, M, Ikeda, M & Asada, K 2012, A design-for-test apparatus for measuring on-chip temperature with fine granularity. : Proceedings - International Symposium on Quality Electronic Design, ISQED., 6187470, pp. 27-32, 13th International Symposium on Quality Electronic Design, ISQED 2012, Santa Clara, CA, 12/3/19. https://doi.org/10.1109/ISQED.2012.6187470
Tandon JS, Sasaki M, Ikeda M, Asada K. A design-for-test apparatus for measuring on-chip temperature with fine granularity. : Proceedings - International Symposium on Quality Electronic Design, ISQED. 2012. p. 27-32. 6187470 https://doi.org/10.1109/ISQED.2012.6187470
Tandon, James S. ; Sasaki, Masahiro ; Ikeda, Makoto ; Asada, Kunihiro. / A design-for-test apparatus for measuring on-chip temperature with fine granularity. Proceedings - International Symposium on Quality Electronic Design, ISQED. 2012. pp. 27-32
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