抜粋
This paper provides a simple design procedure of a synthesis filter bank which synthesizes the decomposed signals of an analysis filter bank to obtain a rescaled signal. The design procedure is derived from the discussion on the equations which are based on the relation between the input and output of the filter bank. It is demonstrated through simulation results that its design procedure is simplified compared with that of a conventional approach.
| 元の言語 | English |
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| ホスト出版物のタイトル | 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012 |
| ページ | 288-291 |
| ページ数 | 4 |
| DOI | |
| 出版物ステータス | Published - 2012 12 1 |
| イベント | 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012 - Kaohsiung, Taiwan, Province of China 継続期間: 2012 12 2 → 2012 12 5 |
出版物シリーズ
| 名前 | IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS |
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Conference
| Conference | 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012 |
|---|---|
| 国 | Taiwan, Province of China |
| 市 | Kaohsiung |
| 期間 | 12/12/2 → 12/12/5 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering
フィンガープリント A design of a synthesis filter bank with fractional scalability factors' の研究トピックを掘り下げます。これらはともに一意のフィンガープリントを構成します。
これを引用
Itami, F., & Watanabe, E. (2012). A design of a synthesis filter bank with fractional scalability factors. ： 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012 (pp. 288-291). [6419028] (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS). https://doi.org/10.1109/APCCAS.2012.6419028