A fully integrated shock wave transmitter with an on-chip dipole antenna for pulse beam-formability in 0.18-μm CMOS

Nguyen Ngoc Mai Khanh, Masahiro Sasaki, Kunihiro Asada

研究成果: Conference contribution

5 被引用数 (Scopus)

抄録

This paper presents a fully integrated 9-11-GHz shock wave transmitter with an on-chip antenna and a digitally programmable delay circuit (DPDC) for pulse beam-formability in short-range microwave active imaging applications. The resitorless shock wave generator (SWG) produces a 0.4-V peak-to-peak (p-p) shock wave output in HSPICE simulation. The DPDC is designed to adjust delays of shock-wave outputs for the beam-forming purpose. SWG's output is sent to an integrated meandering dipole antenna through an on-chip transformer. The measured return loss, S11, of a stand-alone integrated meandering dipole is from -26 dB to -10 dB with frequency range of 7.5-12 GHz. A 1.1-mV(p-p) shock wave output is received by a 20-dB standard gain horn antenna located at a 38-mm distance from the chip. Frequency response and delay resolution of the measured shock wave output are 9-11-GHz and 3-ps, respectively. These characteristics are suitable for fully integrated pulse beam-forming array antenna system.

本文言語English
ホスト出版物のタイトル2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011
ページ107-108
ページ数2
DOI
出版ステータスPublished - 2011 3月 28
外部発表はい
イベント2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011 - Yokohama, Japan
継続期間: 2011 1月 252011 1月 28

出版物シリーズ

名前Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Conference

Conference2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011
国/地域Japan
CityYokohama
Period11/1/2511/1/28

ASJC Scopus subject areas

  • コンピュータ サイエンスの応用
  • コンピュータ グラフィックスおよびコンピュータ支援設計
  • 電子工学および電気工学

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