A multi-Vdd dynamic variable-pipeline on-chip router for CMPs

Hiroki Matsutani, Yuto Hirata, Michihiro Koibuchi, Kimiyoshi Usami, Hiroshi Nakamura, Hideharu Amano

研究成果: Conference contribution

14 引用 (Scopus)

抄録

We propose a multi-voltage (multi-Vdd) variable pipeline router to reduce the power consumption of Network-on-Chips (NoCs) designed for chip multi-processors (CMPs). Our multi-Vdd variable pipeline router adjusts its pipeline depth (i.e., communication latency) and supply voltage level in response to the applied workload. Unlike dynamic voltage and frequency scaling (DVFS) routers, the operating frequency is the same for all routers throughout the CMP; thus, there is no need to synchronize neighboring routers working at different frequencies. In this paper, we implemented the multi-Vdd variable pipeline router, which selects two supply voltage levels and pipeline modes, using a 65nm CMOS process and evaluated it using a full-system CMP simulator. Evaluation results show that although the application performance degraded by 1.0% to 2.1%, the standby power of NoCs reduced by 10.4% to 44.4%.

元の言語English
ホスト出版物のタイトルProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
ページ407-412
ページ数6
DOI
出版物ステータスPublished - 2012
イベント17th Asia and South Pacific Design Automation Conference, ASP-DAC 2012 - Sydney, NSW
継続期間: 2012 1 302012 2 2

Other

Other17th Asia and South Pacific Design Automation Conference, ASP-DAC 2012
Sydney, NSW
期間12/1/3012/2/2

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Routers
Pipelines
Electric potential
Electric power utilization
Simulators
Communication

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design

これを引用

Matsutani, H., Hirata, Y., Koibuchi, M., Usami, K., Nakamura, H., & Amano, H. (2012). A multi-Vdd dynamic variable-pipeline on-chip router for CMPs. : Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC (pp. 407-412). [6164982] https://doi.org/10.1109/ASPDAC.2012.6164982

A multi-Vdd dynamic variable-pipeline on-chip router for CMPs. / Matsutani, Hiroki; Hirata, Yuto; Koibuchi, Michihiro; Usami, Kimiyoshi; Nakamura, Hiroshi; Amano, Hideharu.

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. 2012. p. 407-412 6164982.

研究成果: Conference contribution

Matsutani, H, Hirata, Y, Koibuchi, M, Usami, K, Nakamura, H & Amano, H 2012, A multi-Vdd dynamic variable-pipeline on-chip router for CMPs. : Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC., 6164982, pp. 407-412, 17th Asia and South Pacific Design Automation Conference, ASP-DAC 2012, Sydney, NSW, 12/1/30. https://doi.org/10.1109/ASPDAC.2012.6164982
Matsutani H, Hirata Y, Koibuchi M, Usami K, Nakamura H, Amano H. A multi-Vdd dynamic variable-pipeline on-chip router for CMPs. : Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. 2012. p. 407-412. 6164982 https://doi.org/10.1109/ASPDAC.2012.6164982
Matsutani, Hiroki ; Hirata, Yuto ; Koibuchi, Michihiro ; Usami, Kimiyoshi ; Nakamura, Hiroshi ; Amano, Hideharu. / A multi-Vdd dynamic variable-pipeline on-chip router for CMPs. Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. 2012. pp. 407-412
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