TY - JOUR
T1 - A new interlayer formation technology for completely planarized multilevel interconnection by using LPD
AU - Homma, T.
AU - Katoh, T.
AU - Yamada, Y.
AU - Shimizu, J.
AU - Murao, Y.
PY - 1990/12/1
Y1 - 1990/12/1
N2 - A description is given of a newly developed selective interlayer dielectrics formation technology to realize completely planarized multilevel interconnections. The technology uses liquid phase deposition (LPD) at extremely low temperature (∼40°C). This technology has the capability to realize high density VLSIs such as logic devices beyond 100-kgate and memory devices beyond 16-Mb because of the low thermal stress and the excellent planarization characteristics. This technology eliminates key hole formation in spacings among wirings. Selective deposition is possible by LPD. Compared with conventional CVD films, the LPD-SiO2 film has excellent properties for interlayer dielectrics. A completely planarized two-level interconnection using the LPD technology is discussed.
AB - A description is given of a newly developed selective interlayer dielectrics formation technology to realize completely planarized multilevel interconnections. The technology uses liquid phase deposition (LPD) at extremely low temperature (∼40°C). This technology has the capability to realize high density VLSIs such as logic devices beyond 100-kgate and memory devices beyond 16-Mb because of the low thermal stress and the excellent planarization characteristics. This technology eliminates key hole formation in spacings among wirings. Selective deposition is possible by LPD. Compared with conventional CVD films, the LPD-SiO2 film has excellent properties for interlayer dielectrics. A completely planarized two-level interconnection using the LPD technology is discussed.
UR - http://www.scopus.com/inward/record.url?scp=0025627399&partnerID=8YFLogxK
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U2 - 10.1109/VLSIT.1990.110979
DO - 10.1109/VLSIT.1990.110979
M3 - Conference article
AN - SCOPUS:0025627399
SP - 3
EP - 4
JO - Digest of Technical Papers - Symposium on VLSI Technology
JF - Digest of Technical Papers - Symposium on VLSI Technology
SN - 0743-1562
M1 - 5727439
T2 - 1990 Symposium on VLSI Technology
Y2 - 4 June 1990 through 7 June 1990
ER -