A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode

Shiro Kamohara, Nobuyuki Sugii, Koichiro Ishibashi, Kimiyoshi Usami, Hideharu Amano, Kazutoshi Kobayashi, Cong Kha Pham

研究成果: Conference contribution

抜粋

Presents a conference poster that addresses a perpetuum mobile 32bit central processing unit that resides on 65nm CMOS technology using reverse-body-bias via assisted sleep mode.

元の言語English
ホスト出版物のタイトル2014 IEEE Hot Chips 26 Symposium, HCS 2014
出版者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子版)9781467388832
DOI
出版物ステータスPublished - 2016 5 25
イベント26th IEEE Hot Chips Symposium, HCS 2014 - Cupertino, United States
継続期間: 2014 8 102014 8 12

Other

Other26th IEEE Hot Chips Symposium, HCS 2014
United States
Cupertino
期間14/8/1014/8/12

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture

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  • これを引用

    Kamohara, S., Sugii, N., Ishibashi, K., Usami, K., Amano, H., Kobayashi, K., & Pham, C. K. (2016). A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode. : 2014 IEEE Hot Chips 26 Symposium, HCS 2014 [7478838] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/HOTCHIPS.2014.7478838