A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14μA sleep current using Reverse Body Bias Assisted 65nm SOTB CMOS technology

Koichiro Ishibashi, Nobuyuki Sugii, Kimiyoshi Usami, Hideharu Amano, Kazutoshi Kobayashi, Cong Kha Pham, Hideki Makiyama, Yoshiki Yamamoto, Hirofumi Shinohara, Toshiaki Iwamatsu, Yasuo Yamaguchi, Hidekazu Oda, Takumi Hasegawa, Shinobu Okanishi, Hiroshi Yanagita, Shiro Kamohara, Masaru Kadoshima, Keiichi Maekawa, Tomohiro Yamashita, Duc Hung LeTakumu Yomogita, Masaru Kudo, Kuniaki Kitamori, Shuya Kondo, Yuuki Manzawa

研究成果: Conference contribution

20 被引用数 (Scopus)

抄録

A 32-bit CPU which operates with the lowest energy of 13.4 pJ/cycle at 0.35V and 14MHz, operates at 0.22V to 1.2V and with 0.14μA sleep current is demonstrated. The low power performance is attained by Reverse-Body-Bias- Assisted 65nm SOTB CMOS (Silicon On Thin Buried oxide) technology. The CPU can operate more than 100 years with 610mAH Li battery.

本文言語English
ホスト出版物のタイトルIEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2014 IEEE COOL Chips XVII
出版社IEEE Computer Society
ISBN(印刷版)9781479938094
DOI
出版ステータスPublished - 2014 1 1
イベント17th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2014 - Yokohama, Japan
継続期間: 2014 4 142014 4 16

出版物シリーズ

名前IEEE Symposium on Low-Power and High-Speed Chips - Proceedings for 2014 IEEE COOL Chips XVII

Conference

Conference17th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2014
国/地域Japan
CityYokohama
Period14/4/1414/4/16

ASJC Scopus subject areas

  • 電子工学および電気工学

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