A scalable 3D heterogeneous multi-core processor with inductive-coupling thruchip interface

Noriyuki Miura, Yusuke Koizumi, Eiichi Sasaki, Yasuhiro Take, Hiroki Matsutani, Tadahiro Kuroda, Hideharu Amano, Ryuichi Sakamoto, Mitaro Namiki, Kimiyoshi Usami, Masaaki Kondo, Hiroshi Nakamura

研究成果: Conference contribution

抄録

Recent battery driven IT devices including smart phone and tablets require versatile functions and high performance with low energy consumption. On the other hand, the initial cost of LSI for design and mask development has increased rapidly, and development of an SoC (System-on-a Chip) for each product has become difficult. Although flexible reconfigurable architectures can be a solution, the performance scalability is also necessary to cope with the wide performance range of products. As a solution, heterogeneous multi-core system using a 3-D wireless inductive coupling interconnect is proposed. This system consists of a MIPS-R3000 compatible embedded CPU and reconfigurable accelerators. Since chips are connected with wireless inductive coupling channels, the number and types of accelerators can be tailored easily depending on the requirement of the product.

本文言語English
ホスト出版物のタイトル2013 IEEE Hot Chips 25 Symposium, HCS 2013
出版社Institute of Electrical and Electronics Engineers Inc.
ISBN(電子版)9781467388818
DOI
出版ステータスPublished - 2016 5 24
イベント25th IEEE Hot Chips Symposium, HCS 2013 - Stanford, United States
継続期間: 2013 8 252013 8 27

出版物シリーズ

名前2013 IEEE Hot Chips 25 Symposium, HCS 2013

Other

Other25th IEEE Hot Chips Symposium, HCS 2013
国/地域United States
CityStanford
Period13/8/2513/8/27

ASJC Scopus subject areas

  • ハードウェアとアーキテクチャ

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