TY - JOUR
T1 - A technique for compensating for temperature variation in low-supply-voltage GaAs DCFL circuits
AU - Maeda, Tadashi
AU - Numata, Keiichi
AU - Ohno, Yasuo
AU - Hida, Hikaru
AU - Tokushima, Masatoshi
AU - Fukaishi, Muneo
AU - Ishikawa, Masaoki
AU - Fujii, Masahiro
PY - 1996/11
Y1 - 1996/11
N2 - This paper describes a technique for compensating for the thermal variation in DC characteristics and propagation delay for GaAs DCFL circuits. This technique controls a voltage with a minus-one slope of the transfer curve by applying the substrate voltage. The experimental circuit demonstrated no degradation in noise margin for the temperature range from 30 to 130°C and the temperature coefficient of the propagation delay for this circuit was as small as +0.19%/°C.
AB - This paper describes a technique for compensating for the thermal variation in DC characteristics and propagation delay for GaAs DCFL circuits. This technique controls a voltage with a minus-one slope of the transfer curve by applying the substrate voltage. The experimental circuit demonstrated no degradation in noise margin for the temperature range from 30 to 130°C and the temperature coefficient of the propagation delay for this circuit was as small as +0.19%/°C.
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U2 - 10.1016/0038-1101(96)00098-6
DO - 10.1016/0038-1101(96)00098-6
M3 - Article
AN - SCOPUS:0030285578
VL - 39
SP - 1543
EP - 1547
JO - Solid-State Electronics
JF - Solid-State Electronics
SN - 0038-1101
IS - 11
ER -