An accurate HJFET capacitance-voltage model for implementation with a circuit simulator

Noriaki Matsuno, Hitoshi Yano, Hikaru Hida, Tadashi Maeda

研究成果: Article査読

2 被引用数 (Scopus)

抄録

We present a new accurate HJFET capacitance model to implement with a circuit simulator. This is an analytical model that describes capacitance-voltage (C-V) characteristics over a wide supply voltage range. The model for a capacitance component due to two-dimensional electron gas (2-DEG) conduction is based on gradual channel approximation, and takes into account the gradual capacitance transition near the threshold voltage. It also takes into account the field dependence of the 2DEG mobility, which is very strong for deep sub-micron devices. The model for parasitic MESFET capacitance is based on the formula for a Schottky diode. Since the model consists of physical parameters, it provides feedback between the fabrication process and circuit design. The simulated results agree well with the measurements.

本文言語English
ページ(範囲)373-378
ページ数6
ジャーナルIEEE Transactions on Electron Devices
44
3
DOI
出版ステータスPublished - 1997
外部発表はい

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 電子工学および電気工学

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