| 元の言語 | English |
|---|---|
| ページ（範囲） | 619-612 |
| ジャーナル | The 1998 IEEE Asia-Pacific Conference on Circuits and Systems Proceedings |
| 出版物ステータス | Published - 1998 11 1 |
これを引用
Negishi, Y., Watanabe, E., Nishihara, A., & Yanagisawa, T. (1998). An effective processing on a digital signal processor with complex arithmetic capability. The 1998 IEEE Asia-Pacific Conference on Circuits and Systems Proceedings, 619-612.
An effective processing on a digital signal processor with complex arithmetic capability. / Negishi, Yoshimasa; Watanabe, Eiji; Nishihara, Akinori; Yanagisawa, Takeshi.
：: The 1998 IEEE Asia-Pacific Conference on Circuits and Systems Proceedings, 01.11.1998, p. 619-612.研究成果: Article
Negishi, Y, Watanabe, E, Nishihara, A & Yanagisawa, T 1998, 'An effective processing on a digital signal processor with complex arithmetic capability', The 1998 IEEE Asia-Pacific Conference on Circuits and Systems Proceedings, pp. 619-612.
Negishi Y, Watanabe E, Nishihara A, Yanagisawa T. An effective processing on a digital signal processor with complex arithmetic capability. The 1998 IEEE Asia-Pacific Conference on Circuits and Systems Proceedings. 1998 11 1;619-612.
@article{26b22c8637f549b7be7969bfe48811ad,
title = "An effective processing on a digital signal processor with complex arithmetic capability",
author = "Yoshimasa Negishi and Eiji Watanabe and Akinori Nishihara and Takeshi Yanagisawa",
year = "1998",
month = "11",
day = "1",
language = "English",
pages = "619--612",
journal = "The 1998 IEEE Asia-Pacific Conference on Circuits and Systems Proceedings",
}
TY - JOUR
T1 - An effective processing on a digital signal processor with complex arithmetic capability
AU - Negishi, Yoshimasa
AU - Watanabe, Eiji
AU - Nishihara, Akinori
AU - Yanagisawa, Takeshi
PY - 1998/11/1
Y1 - 1998/11/1
M3 - Article
SP - 619
EP - 612
JO - The 1998 IEEE Asia-Pacific Conference on Circuits and Systems Proceedings
JF - The 1998 IEEE Asia-Pacific Conference on Circuits and Systems Proceedings
ER -