An SoC platform with on-chip web interface for in-field monitoring

Tetsuya Iizuka, Daisuke Nakamura, Hiroaki Yoshida, Satoshi Komatsu, Masahiro Sasaki, Makoto Ikeda, Kunihiro Asada

研究成果: Conference contribution

1 被引用数 (Scopus)

抄録

As the VLSI technologies scale down to the nanometer regime, the circuit design and verification processes have become more and more complex and a reliable operation of VLSI becomes sensitive to the PVT (Process, Voltage, and Temperature) variations. Therefore, the LSI test only before the shipment to screen out the initial failures has been insufficient to ensure the reliable in-field operation of LSI. In this paper, we propose an SoC platform with on-chip web interface to realize an in-field LSI testing and an easy access to the on-chip LSI monitoring circuits such as scan registers, temperature sensors, and so on. We can control the on-chip monitoring systems through the web interface, and can monitor the LSI correct operations from remote locations using the proposed platform. Therefore, the proposed SoC platform realizes the LSI functionality monitoring even after the shipment and can test the in-field operation of LSI. This platform consists of 16-bit CPU, 64K words of instruction/data memory, and 10Base-T ethernet interface. A preliminary version of the proposed platform was implemented on 0.18μm standard CMOS process. The area overhead is 8.44mm2 on 0.18μm process, and is estimated to scale down to about 1mm2 on 65nm process.

本文言語English
ホスト出版物のタイトル2009 International SoC Design Conference, ISOCC 2009
ページ208-211
ページ数4
DOI
出版ステータスPublished - 2009 12 1
外部発表はい
イベント2009 International SoC Design Conference, ISOCC 2009 - Busan, Korea, Republic of
継続期間: 2009 11 222009 11 24

出版物シリーズ

名前2009 International SoC Design Conference, ISOCC 2009

Conference

Conference2009 International SoC Design Conference, ISOCC 2009
CountryKorea, Republic of
CityBusan
Period09/11/2209/11/24

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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